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-rw-r--r--src/mainboard/google/hatch/variants/baseboard/devicetree.cb13
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/gpio.c6
2 files changed, 18 insertions, 1 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
index 4fe0c4cd70..f08e2f9b34 100644
--- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
@@ -18,12 +18,16 @@ chip soc/intel/cannonlake
#| | required to set up a BAR |
#| | for TPM communication |
#| | before memory is up |
+ #| I2C0 | Touchpad |
#+-------------------+---------------------------+
register "common_soc_config" = "{
.gspi[0] = {
.speed_mhz = 1,
.early_init = 1,
},
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ },
}"
device domain 0 on
@@ -36,7 +40,14 @@ chip soc/intel/cannonlake
device pci 14.0 off end # USB xHCI
device pci 14.1 off end # USB xDCI (OTG)
device pci 14.5 off end # SDCard
- device pci 15.0 off end # I2C #0
+ device pci 15.0 on
+ chip drivers/i2c/generic
+ register "hid" = ""ELAN0000""
+ register "desc" = ""ELAN Touchpad""
+ register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A21_IRQ)"
+ device i2c 15 on end
+ end
+ end # I2C #0
device pci 15.1 off end # I2C #1
device pci 15.2 off end # I2C #2
device pci 15.3 off end # I2C #3
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c
index 69a0f3781b..d215b099e9 100644
--- a/src/mainboard/google/hatch/variants/baseboard/gpio.c
+++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c
@@ -19,6 +19,8 @@
#include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = {
+ /* TRACKPAD_INT_ODL */
+ PAD_CFG_GPI_APIC(GPP_A21, NONE, PLTRST, LEVEL, INVERT),
/* H1_SLAVE_SPI_CS_L */
PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_CLK */
@@ -27,6 +29,10 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_B17, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_MOSI_R */
PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1),
+ /* PCH_I2C_TRACKPAD_SDA */
+ PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
+ /* PCH_I2C_TRACKPAD_SCL */
+ PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
/* H1_PCH_INT_ODL */
PAD_CFG_GPI_APIC(GPP_C21, NONE, DEEP, LEVEL, INVERT),
/* PCH_WP_OD */