diff options
Diffstat (limited to 'src')
7 files changed, 21 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/variants/delbin/gpio.c b/src/mainboard/google/volteer/variants/delbin/gpio.c index 614ff6c517..1d4bfe6ef6 100644 --- a/src/mainboard/google/volteer/variants/delbin/gpio.c +++ b/src/mainboard/google/volteer/variants/delbin/gpio.c @@ -145,6 +145,9 @@ static const struct pad_config early_gpio_table[] = { PAD_CFG_GPO(GPP_C0, 1, DEEP), /* C21 : UART2_TXD ==> H1_PCH_INT_ODL */ PAD_CFG_GPI_APIC(GPP_C21, NONE, PLTRST, LEVEL, INVERT), + + /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ + PAD_CFG_GPO(GPP_D16, 1, DEEP), }; const struct pad_config *variant_override_gpio_table(size_t *num) diff --git a/src/mainboard/google/volteer/variants/malefor/gpio.c b/src/mainboard/google/volteer/variants/malefor/gpio.c index cdffb60dd9..22dec73eac 100644 --- a/src/mainboard/google/volteer/variants/malefor/gpio.c +++ b/src/mainboard/google/volteer/variants/malefor/gpio.c @@ -183,6 +183,9 @@ static const struct pad_config early_gpio_table[] = { /* C22 : UART2_RTS# ==> PCH_FPMCU_BOOT0 */ PAD_CFG_GPO(GPP_C22, 0, DEEP), + /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ + PAD_CFG_GPO(GPP_D16, 1, DEEP), + /* E12 : SPI1_MISO_IO1 ==> PEN_ALERT_ODL */ PAD_CFG_GPO(GPP_E12, 1, DEEP), diff --git a/src/mainboard/google/volteer/variants/terrador/gpio.c b/src/mainboard/google/volteer/variants/terrador/gpio.c index 1a4976645a..a0267cc7b1 100644 --- a/src/mainboard/google/volteer/variants/terrador/gpio.c +++ b/src/mainboard/google/volteer/variants/terrador/gpio.c @@ -212,6 +212,9 @@ static const struct pad_config early_gpio_table[] = { /* C22 : UART2_RTS# ==> PCH_FPMCU_BOOT0 */ PAD_CFG_GPO(GPP_C22, 0, DEEP), + /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ + PAD_CFG_GPO(GPP_D16, 1, DEEP), + /* E12 : SPI1_MISO_IO1 ==> PEN_ALERT_ODL */ PAD_CFG_GPI(GPP_E12, NONE, DEEP), }; diff --git a/src/mainboard/google/volteer/variants/todor/gpio.c b/src/mainboard/google/volteer/variants/todor/gpio.c index e49e2dccf5..f202543cf6 100644 --- a/src/mainboard/google/volteer/variants/todor/gpio.c +++ b/src/mainboard/google/volteer/variants/todor/gpio.c @@ -218,6 +218,9 @@ static const struct pad_config early_gpio_table[] = { /* C22 : UART2_RTS# ==> PCH_FPMCU_BOOT0 */ PAD_CFG_GPO(GPP_C22, 0, DEEP), + /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ + PAD_CFG_GPO(GPP_D16, 1, DEEP), + /* E12 : SPI1_MISO_IO1 ==> PEN_ALERT_ODL */ PAD_CFG_GPI(GPP_E12, NONE, DEEP), }; diff --git a/src/mainboard/google/volteer/variants/volteer/gpio.c b/src/mainboard/google/volteer/variants/volteer/gpio.c index df17e5046f..fd355a88aa 100644 --- a/src/mainboard/google/volteer/variants/volteer/gpio.c +++ b/src/mainboard/google/volteer/variants/volteer/gpio.c @@ -231,6 +231,9 @@ static const struct pad_config early_gpio_table[] = { /* C22 : UART2_RTS# ==> PCH_FPMCU_BOOT0 */ PAD_CFG_GPO(GPP_C22, 0, DEEP), + /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ + PAD_NC(GPP_D16, UP_20K), + /* E12 : SPI1_MISO_IO1 ==> EN_PP3300_SSD */ PAD_CFG_GPO(GPP_E12, 1, DEEP), diff --git a/src/mainboard/google/volteer/variants/volteer2/gpio.c b/src/mainboard/google/volteer/variants/volteer2/gpio.c index 7b14646fd5..c7fa706406 100644 --- a/src/mainboard/google/volteer/variants/volteer2/gpio.c +++ b/src/mainboard/google/volteer/variants/volteer2/gpio.c @@ -231,6 +231,9 @@ static const struct pad_config early_gpio_table[] = { /* C22 : UART2_RTS# ==> PCH_FPMCU_BOOT0 */ PAD_CFG_GPO(GPP_C22, 0, DEEP), + /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ + PAD_NC(GPP_D16, UP_20K), + /* E12 : SPI1_MISO_IO1 ==> EN_PP3300_SSD */ PAD_CFG_GPO(GPP_E12, 1, DEEP), diff --git a/src/mainboard/google/volteer/variants/voxel/gpio.c b/src/mainboard/google/volteer/variants/voxel/gpio.c index b65e813c03..3ce9238f87 100644 --- a/src/mainboard/google/volteer/variants/voxel/gpio.c +++ b/src/mainboard/google/volteer/variants/voxel/gpio.c @@ -240,6 +240,9 @@ static const struct pad_config early_gpio_table[] = { /* C22 : UART2_RTS# ==> PCH_FPMCU_BOOT0 */ PAD_CFG_GPO(GPP_C22, 0, DEEP), + /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ + PAD_CFG_GPO(GPP_D16, 1, DEEP), + /* E12 : SPI1_MISO_IO1 ==> EN_PP3300_SSD */ PAD_CFG_GPO(GPP_E12, 1, DEEP), }; |