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-rw-r--r--src/include/memlayout.h27
-rw-r--r--src/lib/Makefile.inc1
-rw-r--r--src/soc/broadcom/cygnus/include/soc/memlayout.ld1
-rw-r--r--src/soc/imgtec/pistachio/include/soc/memlayout.ld1
-rw-r--r--src/soc/marvell/bg4cd/include/soc/memlayout.ld1
-rw-r--r--src/soc/nvidia/tegra124/include/soc/memlayout.ld1
-rw-r--r--src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld1
-rw-r--r--src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld1
-rw-r--r--src/soc/qualcomm/ipq806x/include/soc/memlayout.ld1
-rw-r--r--src/soc/rockchip/rk3288/include/soc/memlayout.ld1
-rw-r--r--src/soc/samsung/exynos5250/include/soc/memlayout.ld1
-rw-r--r--src/vendorcode/google/chromeos/memlayout.h54
-rw-r--r--src/vendorcode/google/chromeos/vboot2/Makefile.inc2
-rw-r--r--src/vendorcode/google/chromeos/vboot2/verstage.ld58
14 files changed, 28 insertions, 123 deletions
diff --git a/src/include/memlayout.h b/src/include/memlayout.h
index aa22be99d1..f67753c527 100644
--- a/src/include/memlayout.h
+++ b/src/include/memlayout.h
@@ -132,4 +132,31 @@
. += sz;
#endif
+/* Careful: required work buffer size depends on RW properties such as key size
+ * and algorithm -- what works for you might stop working after an update. Do
+ * NOT lower the asserted minimum without consulting vboot devs (rspangler)! */
+#define VBOOT2_WORK(addr, size) \
+ REGION(vboot2_work, addr, size, 16) \
+ _ = ASSERT(size >= 12K, "vboot2 work buffer must be at least 12K!");
+
+#if ENV_VERSTAGE
+ #define VERSTAGE(addr, sz) \
+ SET_COUNTER(verstage, addr) \
+ _ = ASSERT(_eprogram - _program <= sz, \
+ STR(Verstage exceeded its allotted size! (sz))); \
+ INCLUDE "lib/program.verstage.ld"
+
+ #define OVERLAP_VERSTAGE_ROMSTAGE(addr, size) VERSTAGE(addr, size)
+#else
+ #define VERSTAGE(addr, sz) \
+ SET_COUNTER(verstage, addr) \
+ . += sz;
+
+ #define OVERLAP_VERSTAGE_ROMSTAGE(addr, size) ROMSTAGE(addr, size)
+#endif
+
+#define WATCHDOG_TOMBSTONE(addr, size) \
+ REGION(watchdog_tombstone, addr, size, 4) \
+ _ = ASSERT(size == 4, "watchdog tombstones should be exactly 4 byte!");
+
#endif /* __MEMLAYOUT_H */
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 464d631aab..d8cd1d8b83 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -199,6 +199,7 @@ endif
romstage-y += program.ld
ramstage-y += program.ld
+verstage-y += program.ld
ifeq ($(CONFIG_RELOCATABLE_MODULES),y)
ramstage-y += rmodule.c
diff --git a/src/soc/broadcom/cygnus/include/soc/memlayout.ld b/src/soc/broadcom/cygnus/include/soc/memlayout.ld
index 5e149b4c4d..237ffc6203 100644
--- a/src/soc/broadcom/cygnus/include/soc/memlayout.ld
+++ b/src/soc/broadcom/cygnus/include/soc/memlayout.ld
@@ -18,7 +18,6 @@
*/
#include <memlayout.h>
-#include <vendorcode/google/chromeos/memlayout.h>
#include <arch/header.ld>
diff --git a/src/soc/imgtec/pistachio/include/soc/memlayout.ld b/src/soc/imgtec/pistachio/include/soc/memlayout.ld
index 366b20ac91..59e30179f5 100644
--- a/src/soc/imgtec/pistachio/include/soc/memlayout.ld
+++ b/src/soc/imgtec/pistachio/include/soc/memlayout.ld
@@ -18,7 +18,6 @@
*/
#include <memlayout.h>
-#include <vendorcode/google/chromeos/memlayout.h>
#include <arch/header.ld>
diff --git a/src/soc/marvell/bg4cd/include/soc/memlayout.ld b/src/soc/marvell/bg4cd/include/soc/memlayout.ld
index 15c09d96a1..45835e20e2 100644
--- a/src/soc/marvell/bg4cd/include/soc/memlayout.ld
+++ b/src/soc/marvell/bg4cd/include/soc/memlayout.ld
@@ -18,7 +18,6 @@
*/
#include <memlayout.h>
-#include <vendorcode/google/chromeos/memlayout.h>
#include <arch/header.ld>
diff --git a/src/soc/nvidia/tegra124/include/soc/memlayout.ld b/src/soc/nvidia/tegra124/include/soc/memlayout.ld
index 2312cc93e3..561833df16 100644
--- a/src/soc/nvidia/tegra124/include/soc/memlayout.ld
+++ b/src/soc/nvidia/tegra124/include/soc/memlayout.ld
@@ -18,7 +18,6 @@
*/
#include <memlayout.h>
-#include <vendorcode/google/chromeos/memlayout.h>
#include <arch/header.ld>
diff --git a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld
index 0f98fd2b3b..a8164a91a4 100644
--- a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld
+++ b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld
@@ -18,7 +18,6 @@
*/
#include <memlayout.h>
-#include <vendorcode/google/chromeos/memlayout.h>
#include <arch/header.ld>
diff --git a/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld b/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld
index c140e013d9..dee67980d0 100644
--- a/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld
+++ b/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld
@@ -18,7 +18,6 @@
*/
#include <memlayout.h>
-#include <vendorcode/google/chromeos/memlayout.h>
#include <arch/header.ld>
diff --git a/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld b/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
index cf417bac31..ad0977ae75 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
+++ b/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
@@ -19,7 +19,6 @@
*/
#include <memlayout.h>
-#include <vendorcode/google/chromeos/memlayout.h>
#include <arch/header.ld>
diff --git a/src/soc/rockchip/rk3288/include/soc/memlayout.ld b/src/soc/rockchip/rk3288/include/soc/memlayout.ld
index 0b759327de..b96923e677 100644
--- a/src/soc/rockchip/rk3288/include/soc/memlayout.ld
+++ b/src/soc/rockchip/rk3288/include/soc/memlayout.ld
@@ -18,7 +18,6 @@
*/
#include <memlayout.h>
-#include <vendorcode/google/chromeos/memlayout.h>
#include <arch/header.ld>
diff --git a/src/soc/samsung/exynos5250/include/soc/memlayout.ld b/src/soc/samsung/exynos5250/include/soc/memlayout.ld
index 3b5b034d2a..4469078969 100644
--- a/src/soc/samsung/exynos5250/include/soc/memlayout.ld
+++ b/src/soc/samsung/exynos5250/include/soc/memlayout.ld
@@ -18,7 +18,6 @@
*/
#include <memlayout.h>
-#include <vendorcode/google/chromeos/memlayout.h>
#include <arch/header.ld>
diff --git a/src/vendorcode/google/chromeos/memlayout.h b/src/vendorcode/google/chromeos/memlayout.h
deleted file mode 100644
index 29434bdf1e..0000000000
--- a/src/vendorcode/google/chromeos/memlayout.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-/* This file contains macro definitions for memlayout.ld linker scripts. */
-
-#ifndef __CHROMEOS_MEMLAYOUT_H
-#define __CHROMEOS_MEMLAYOUT_H
-
-/* Careful: required work buffer size depends on RW properties such as key size
- * and algorithm -- what works for you might stop working after an update. Do
- * NOT lower the asserted minimum without consulting vboot devs (rspangler)! */
-#define VBOOT2_WORK(addr, size) \
- REGION(vboot2_work, addr, size, 16) \
- _ = ASSERT(size >= 12K, "vboot2 work buffer must be at least 12K!");
-
-#ifdef __VERSTAGE__
- #define VERSTAGE(addr, sz) \
- SET_COUNTER(VERSTAGE, addr) \
- _ = ASSERT(_everstage - _verstage <= sz, \
- STR(Verstage exceeded its allotted size! (sz))); \
- INCLUDE "vendorcode/google/chromeos/vboot2/verstage.verstage.ld"
-#else
- #define VERSTAGE(addr, sz) \
- SET_COUNTER(VERSTAGE, addr) \
- . += sz;
-#endif
-
-#ifdef __VERSTAGE__
- #define OVERLAP_VERSTAGE_ROMSTAGE(addr, size) VERSTAGE(addr, size)
-#else
- #define OVERLAP_VERSTAGE_ROMSTAGE(addr, size) ROMSTAGE(addr, size)
-#endif
-
-#define WATCHDOG_TOMBSTONE(addr, size) \
- REGION(watchdog_tombstone, addr, size, 4) \
- _ = ASSERT(size == 4, "watchdog tombstones should be exactly 4 byte!");
-
-#endif /* __CHROMEOS_MEMLAYOUT_H */
diff --git a/src/vendorcode/google/chromeos/vboot2/Makefile.inc b/src/vendorcode/google/chromeos/vboot2/Makefile.inc
index b805993b5c..21613ba52f 100644
--- a/src/vendorcode/google/chromeos/vboot2/Makefile.inc
+++ b/src/vendorcode/google/chromeos/vboot2/Makefile.inc
@@ -42,8 +42,6 @@ romstage-y += vboot_handoff.c common.c
ramstage-y += common.c
-verstage-y += verstage.ld
-
ifeq ($(CONFIG_SEPARATE_VERSTAGE),y)
VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-verstage-y))
else
diff --git a/src/vendorcode/google/chromeos/vboot2/verstage.ld b/src/vendorcode/google/chromeos/vboot2/verstage.ld
deleted file mode 100644
index fcb8af89ee..0000000000
--- a/src/vendorcode/google/chromeos/vboot2/verstage.ld
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-/* This file is included inside a SECTIONS block */
-
-.text . : {
- _program = .;
- _verstage = .;
- *(.text._start);
- *(.text.stage_entry);
- *(.text);
- *(.text.*);
-} : to_load
-
-.data . : {
- *(.rodata);
- *(.rodata.*);
- *(.data);
- *(.data.*);
- . = ALIGN(8);
-}
-
-.bss . : {
- . = ALIGN(8);
- _bss = .;
- *(.bss)
- *(.bss.*)
- *(.sbss)
- *(.sbss.*)
- _ebss = .;
- _everstage = .;
- _eprogram = .;
-}
-
-/* Discard the sections we don't need/want */
-/DISCARD/ : {
- *(.comment)
- *(.note)
- *(.comment.*)
- *(.note.*)
- *(.eh_frame);
-}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 21:18:55 +0000