diff options
Diffstat (limited to 'src')
7 files changed, 59 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/mainboard.c b/src/mainboard/google/dedede/mainboard.c index c503a86a6e..fe89527e5a 100644 --- a/src/mainboard/google/dedede/mainboard.c +++ b/src/mainboard/google/dedede/mainboard.c @@ -1,11 +1,25 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include <acpi/acpi.h> +#include <bootstate.h> #include <baseboard/variants.h> #include <device/device.h> #include <ec/ec.h> #include <vendorcode/google/chromeos/chromeos.h> +__weak void variant_isst_override(void) +{ + /* + * Implement the override only if the board uses very early/initial revisions of + * Silicon. Otherwise nothing to override. + */ +} + +static void mainboard_config_isst(void *unused) +{ + variant_isst_override(); +} + static void mainboard_init(void *chip_info) { const struct pad_config *pads; @@ -37,3 +51,6 @@ struct chip_operations mainboard_ops = { .init = mainboard_init, .enable_dev = mainboard_enable, }; + +/* Configure ISST before CPU initialization */ +BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, mainboard_config_isst, NULL); diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index c891e6e376..1b42dfb81a 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -133,6 +133,9 @@ chip soc/intel/jasperlake register "DdiPortBDdc" = "1" register "DdiPortCDdc" = "1" + # Enable Speed Shift Technology support + register "speed_shift_enable" = "1" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | diff --git a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h index 3fdc7824eb..5d8355b2fe 100644 --- a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h @@ -39,4 +39,7 @@ int variant_memory_sku(void); */ bool variant_mem_is_half_populated(void); +/* Variant Intel Speed Shift Technology override */ +void variant_isst_override(void); + #endif /*__BASEBOARD_VARIANTS_H__ */ diff --git a/src/mainboard/google/dedede/variants/waddledee/Makefile.inc b/src/mainboard/google/dedede/variants/waddledee/Makefile.inc index dfb97bae95..aaa65e2a2a 100644 --- a/src/mainboard/google/dedede/variants/waddledee/Makefile.inc +++ b/src/mainboard/google/dedede/variants/waddledee/Makefile.inc @@ -4,3 +4,5 @@ SPD_SOURCES = SPD_LPDDR4X_200b_8Gb_4267_DDP_1x16 #0b0000 SPD_SOURCES += empty #0b0001 romstage-y += memory.c + +ramstage-y += variant.c diff --git a/src/mainboard/google/dedede/variants/waddledee/variant.c b/src/mainboard/google/dedede/variants/waddledee/variant.c new file mode 100644 index 0000000000..ac3cf581d9 --- /dev/null +++ b/src/mainboard/google/dedede/variants/waddledee/variant.c @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/variants.h> +#include <chip.h> +#include <device/device.h> +#include <ec/google/chromeec/ec.h> + +void variant_isst_override(void) +{ + config_t *cfg = config_of_soc(); + uint32_t board_ver; + + /* Override/Disable ISST in boards where board version is not populated. */ + if (google_chromeec_get_board_version(&board_ver)) + cfg->speed_shift_enable = 0; +} diff --git a/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc b/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc index 922c314ee3..11bbbd60cc 100644 --- a/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc +++ b/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc @@ -4,3 +4,5 @@ SPD_SOURCES = empty #0b0000 SPD_SOURCES += SPD_LPDDR4X_200b_8Gb_4267_DDP_1x16 #0b0001 romstage-y += memory.c + +ramstage-y += variant.c diff --git a/src/mainboard/google/dedede/variants/waddledoo/variant.c b/src/mainboard/google/dedede/variants/waddledoo/variant.c new file mode 100644 index 0000000000..ac3cf581d9 --- /dev/null +++ b/src/mainboard/google/dedede/variants/waddledoo/variant.c @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/variants.h> +#include <chip.h> +#include <device/device.h> +#include <ec/google/chromeec/ec.h> + +void variant_isst_override(void) +{ + config_t *cfg = config_of_soc(); + uint32_t board_ver; + + /* Override/Disable ISST in boards where board version is not populated. */ + if (google_chromeec_get_board_version(&board_ver)) + cfg->speed_shift_enable = 0; +} |