3 files changed, 15 insertions, 6 deletions
diff --git a/src/mainboard/google/geralt/Makefile.inc b/src/mainboard/google/geralt/Makefile.inc
index 9a35496502..0c3da90a56 100644
--- a/src/mainboard/google/geralt/Makefile.inc
+++ b/src/mainboard/google/geralt/Makefile.inc
@@ -7,6 +7,7 @@ bootblock-y += chromeos.c
 verstage-y += memlayout.ld
 verstage-y += chromeos.c
 verstage-y += reset.c
+verstage-y += verstage.c
 
 romstage-y += memlayout.ld
 romstage-y += chromeos.c
diff --git a/src/mainboard/google/geralt/bootblock.c b/src/mainboard/google/geralt/bootblock.c
index 2bd69add2c..73b0f8a8dc 100644
--- a/src/mainboard/google/geralt/bootblock.c
+++ b/src/mainboard/google/geralt/bootblock.c
@@ -1,10 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <bootblock_common.h>
-#include <device/mmio.h>
 #include <gpio.h>
-#include <soc/gpio.h>
-#include <soc/i2c.h>
 #include <soc/spi.h>
 
 #include "gpio.h"
@@ -16,10 +13,7 @@ static void usb3_hub_reset(void)
 
 void bootblock_mainboard_init(void)
 {
-	mtk_i2c_bus_init(CONFIG_DRIVER_TPM_I2C_BUS, I2C_SPEED_FAST);
-	mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0);
 	mtk_snfc_init();
 	setup_chromeos_gpios();
-	gpio_eint_configure(GPIO_GSC_AP_INT_ODL, IRQ_TYPE_EDGE_RISING);
 	usb3_hub_reset();
 }
diff --git a/src/mainboard/google/geralt/verstage.c b/src/mainboard/google/geralt/verstage.c
new file mode 100644
index 0000000000..e4b19fd9e7
--- /dev/null
+++ b/src/mainboard/google/geralt/verstage.c
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <security/vboot/vboot_common.h>
+#include <soc/i2c.h>
+#include <soc/spi.h>
+
+#include "gpio.h"
+
+void verstage_mainboard_init(void)
+{
+	mtk_i2c_bus_init(CONFIG_DRIVER_TPM_I2C_BUS, I2C_SPEED_FAST);
+	mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0);
+	gpio_eint_configure(GPIO_GSC_AP_INT_ODL, IRQ_TYPE_EDGE_RISING);
+}