2 files changed, 63 insertions, 0 deletions
diff --git a/src/mainboard/google/reef/acpi/mainboard.asl b/src/mainboard/google/reef/acpi/mainboard.asl
index 5b6e976093..6e6d61faeb 100644
--- a/src/mainboard/google/reef/acpi/mainboard.asl
+++ b/src/mainboard/google/reef/acpi/mainboard.asl
@@ -38,3 +38,63 @@ Scope (\_SB.PCI0.LPCB)
 	/* Chrome OS Embedded Controller */
 	#include "ec.asl"
 }
+
+Scope (\_SB.PCI0.I2C0)
+{
+	/* Headphone Codec */
+	Device (HPDA)
+	{
+		Name (_HID, "DLGS7219")
+		Name (_DDN, "Dialog DA7219 Codec")
+		Name (_UID, 1)
+		Name (_S0W, 4)
+		Name (_DSD, Package () {
+			ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+			Package () {
+			Package () { "dlg,micbias-lvl", 2600 },
+			Package () { "dlg,mic-amp-in-sel", "diff" },
+			},
+			ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
+			Package () {
+				Package () {"da7219_aad", "DAAD"},
+			}
+		})
+
+		Name (DAAD, Package () {
+			ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+			Package () {
+				Package () { "dlg,btn-cfg", 50 },
+				Package () { "dlg,mic-det-thr", 500 },
+				Package () { "dlg,jack-ins-deb", 20 },
+				Package () { "dlg,jack-det-rate", "32ms_64ms" },
+				Package () { "dlg,jack-rem-deb", 1 },
+				Package () { "dlg,a-d-btn-thr", 0xa },
+				Package () { "dlg,d-b-btn-thr", 0x16 },
+				Package () { "dlg,b-c-btn-thr", 0x21 },
+				Package () { "dlg,c-mic-btn-thr", 0x3E },
+				Package () { "dlg,btn-avg", 4 },
+				Package () { "dlg,adc-1bit-rpt", 1 },
+			}
+		})
+
+		Name (_CRS, ResourceTemplate()
+		{
+			I2cSerialBus (
+				BOARD_HP_MIC_CODEC_I2C_ADDR,
+				ControllerInitiated,
+				400000,
+				AddressingMode7Bit,
+				"\\_SB.PCI0.I2C0",
+			)
+			Interrupt (ResourceConsumer, Level, ActiveLow)
+			{
+				BOARD_HP_MIC_CODEC_IRQ
+			}
+		})
+
+		Method (_STA)
+		{
+			Return (0xF)
+		}
+	}
+}
diff --git a/src/mainboard/google/reef/gpio.h b/src/mainboard/google/reef/gpio.h
index bd491b49ff..91e8bb10d9 100644
--- a/src/mainboard/google/reef/gpio.h
+++ b/src/mainboard/google/reef/gpio.h
@@ -21,6 +21,9 @@
 /* Input device interrupt configuration */
 #define TOUCHPAD_INT		GPIO_18_IRQ
 
+#define BOARD_HP_MIC_CODEC_IRQ	GPIO_116_IRQ
+#define BOARD_HP_MIC_CODEC_I2C_ADDR	0x1a
+
 #ifndef __ACPI__
 /*
  * Pad configuration in ramstage. The order largely follows the 'GPIO Muxing'