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-rw-r--r--src/arch/arm/include/clocks.h24
-rw-r--r--src/include/cpu/x86/smi_deprecated.h12
-rw-r--r--src/mainboard/intel/archercity_crb/include/mainboard_ras.h12
-rw-r--r--src/mainboard/inventec/transformers/include/mainboard_ras.h12
-rw-r--r--src/soc/amd/common/block/include/amdblocks/acpimmio_legacy_gpio100.h33
-rw-r--r--src/soc/intel/braswell/include/soc/hda.h27
-rw-r--r--src/soc/samsung/common/include/soc/dsim.h92
-rw-r--r--src/soc/samsung/common/include/soc/i2s-regs.h125
-rw-r--r--src/southbridge/amd/common/amd_defs.h8
9 files changed, 0 insertions, 345 deletions
diff --git a/src/arch/arm/include/clocks.h b/src/arch/arm/include/clocks.h
deleted file mode 100644
index dc3080cc9a..0000000000
--- a/src/arch/arm/include/clocks.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-/* Standard clock speeds */
-
-/*
- * We define some commonly-used clock speeds to avoid error since long
- * numbers are hard to read.
- *
- * The format of the label is
- * CLK_x_yU where:
- * x is the integer speed
- * y is the fractional part which can be omitted if 0
- * U is the units (blank for Hz, K or M for KHz and MHz)
- *
- * Please order the items by increasing Hz
- */
-enum {
- CLK_32768 = 32768,
- CLK_20M = 20000000,
- CLK_24M = 24000000,
- CLK_144M = 144000000,
- CLK_216M = 216000000,
- CLK_300M = 300000000,
-};
diff --git a/src/include/cpu/x86/smi_deprecated.h b/src/include/cpu/x86/smi_deprecated.h
deleted file mode 100644
index 262aa0b695..0000000000
--- a/src/include/cpu/x86/smi_deprecated.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef __X86_SMI_DEPRECATED_H__
-#define __X86_SMI_DEPRECATED_H__
-
-void smm_init(void);
-void smm_init_completion(void);
-
-/* Entry from smmhandler.S. */
-void smi_handler(void);
-
-#endif
diff --git a/src/mainboard/intel/archercity_crb/include/mainboard_ras.h b/src/mainboard/intel/archercity_crb/include/mainboard_ras.h
deleted file mode 100644
index 76f38726e0..0000000000
--- a/src/mainboard/intel/archercity_crb/include/mainboard_ras.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef MAINBOARD_RAS_H
-#define MAINBOARD_RAS_H
-
-struct fru {
- const char *str;
-};
-
-struct fru *mainboard_ras_get_ch_map(void);
-
-#endif
diff --git a/src/mainboard/inventec/transformers/include/mainboard_ras.h b/src/mainboard/inventec/transformers/include/mainboard_ras.h
deleted file mode 100644
index 76f38726e0..0000000000
--- a/src/mainboard/inventec/transformers/include/mainboard_ras.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef MAINBOARD_RAS_H
-#define MAINBOARD_RAS_H
-
-struct fru {
- const char *str;
-};
-
-struct fru *mainboard_ras_get_ch_map(void);
-
-#endif
diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio_legacy_gpio100.h b/src/soc/amd/common/block/include/amdblocks/acpimmio_legacy_gpio100.h
deleted file mode 100644
index e7ef80a760..0000000000
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio_legacy_gpio100.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-#ifndef AMD_BLOCK_ACPIMMIO_LEGACY_GPIO_100_H
-#define AMD_BLOCK_ACPIMMIO_LEGACY_GPIO_100_H
-
-#include <amdblocks/acpimmio.h>
-#include <device/mmio.h>
-#include <types.h>
-
-/* These iomux_read/write8 are to be deprecated to enforce proper
- use of <gpio.h> API for pin configurations. */
-static inline uint8_t iomux_read8(uint8_t reg)
-{
- return read8(acpimmio_iomux + reg);
-}
-
-static inline void iomux_write8(uint8_t reg, uint8_t value)
-{
- write8(acpimmio_iomux + reg, value);
-}
-
-/* Old GPIO configuration registers */
-static inline uint8_t gpio_100_read8(uint8_t reg)
-{
- return read8(acpimmio_gpio_100 + reg);
-}
-
-static inline void gpio_100_write8(uint8_t reg, uint8_t value)
-{
- write8(acpimmio_gpio_100 + reg, value);
-}
-
-#endif /* AMD_BLOCK_ACPIMMIO_LEGACY_GPIO_100_H */
diff --git a/src/soc/intel/braswell/include/soc/hda.h b/src/soc/intel/braswell/include/soc/hda.h
deleted file mode 100644
index c418f5c682..0000000000
--- a/src/soc/intel/braswell/include/soc/hda.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef _SOC_HDA_H_
-#define _SOC_HDA_H_
-
-/*
- * PCI config registers.
- */
-
-#define HDA_DCKSTS 0x4d
-# define HDA_DCKSTS_DS (1 << 7)
-# define HDA_DCKSTS_DM (1 << 0)
-
-#define HDA_DEVC 0x78
-# define HDA_DEVC_MRRS 0x7000
-# define HDA_DEVC_NSNPEN (1 << 11)
-# define HDA_DEVC_AUXPEN (1 << 10)
-# define HDA_DEVC_PEEN (1 << 9)
-# define HDA_DEVC_ETEN (1 << 8)
-# define HDA_DEVC_MAXPAY 0x00e0
-# define HDA_DEVC_ROEN (1 << 4)
-# define HDA_DEVC_URREN (1 << 3)
-# define HDA_DEVC_FEREN (1 << 2)
-# define HDA_DEVC_NFEREN (1 << 1)
-# define HDA_DEVC_CEREN (1 << 0)
-
-#endif /* _SOC_HDA_H_ */
diff --git a/src/soc/samsung/common/include/soc/dsim.h b/src/soc/samsung/common/include/soc/dsim.h
deleted file mode 100644
index 541c72a3c0..0000000000
--- a/src/soc/samsung/common/include/soc/dsim.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* Register map for Exynos5 MIPI-DSIM */
-
-#ifndef SOC_SAMSUNG_COMMON_INCLUDE_SOC_DSIM_H
-#define SOC_SAMSUNG_COMMON_INCLUDE_SOC_DSIM_H
-
-/* DSIM register map */
-struct exynos5_dsim {
- unsigned int status;
- unsigned int swrst;
- unsigned int clkctrl;
- unsigned int timeout;
- unsigned int config;
- unsigned int escmode;
- unsigned int mdresol;
- unsigned int mvporch;
- unsigned int mhporch;
- unsigned int msync;
- unsigned int sdresol;
- unsigned int intsrc;
- unsigned int intmsk;
- unsigned int pkthdr;
- unsigned int payload;
- unsigned int rxfifo;
- unsigned int res1;
- unsigned int fifoctrl;
- unsigned int res2;
- unsigned int pllctrl;
- unsigned int plltmr;
- unsigned int phyacchr;
- unsigned int phyacchr1;
-};
-check_member(exynos5_dsim, phyacchr1, 0x54);
-
-#define ENABLE 1
-#define DISABLE 0
-
-#define DSIM_SWRST (1 << 0)
-#define NUM_OF_DAT_LANE_IS_FOUR (3 << 5)
-#define DATA_LANE_0_EN (1 << 0)
-#define DATA_LANE_1_EN (1 << 1)
-#define DATA_LANE_2_EN (1 << 2)
-#define DATA_LANE_3_EN (1 << 3)
-#define CLK_LANE_EN (1 << 4)
-#define ENABLE_ALL_DATA_LANE DATA_LANE_0_EN | \
- DATA_LANE_1_EN | \
- DATA_LANE_2_EN | \
- DATA_LANE_3_EN
-#define MAIN_PIX_FORMAT_OFFSET 12
-#define RGB_565_16_BIT 0x4
-#define VIDEO_MODE (1 << 25)
-#define BURST_MODE (1 << 26)
-
-#define DSIM_PHYACCHR_AFC_EN (1 << 14)
-#define DSIM_PHYACCHR_AFC_CTL_OFFSET 5
-
-#define DSIM_PLLCTRL_PMS_OFFSET 1
-#define DSIM_FREQ_BAND_OFFSET 24
-
-#define LANE_ESC_CLK_EN_ALL (0x1f << 19)
-#define BYTE_CLK_EN (1 << 24)
-#define DSIM_ESC_CLK_EN (1 << 28)
-#define TXREQUEST_HS_CLK_ON (1 << 31)
-
-#define LP_MODE_ENABLE (1 << 7)
-#define STOP_STATE_CNT_OFFSET 21
-
-#define MAIN_VBP_OFFSET 0
-#define STABLE_VFP_OFFSET 16
-#define CMD_ALLOW_OFFSET 28
-
-#define MAIN_HBP_OFFSET 0
-#define MAIN_HFP_OFFSET 16
-
-#define MAIN_HSA_OFFSET 0
-#define MAIN_VSA_OFFSET 22
-
-#define MAIN_STANDBY (1 << 31)
-#define MAIN_VRESOL_OFFSET 16
-#define MAIN_HRESOL_OFFSET 0
-
-#define SFR_FIFO_EMPTY (1 << 29)
-
-#define DSIM_PLL_EN_SHIFT (1 << 23)
-#define PLL_STABLE (1 << 31)
-
-#define DSIM_STOP_STATE_DAT(x) (((x) & 0xf) << 0)
-#define DSIM_STOP_STATE_CLK (1 << 8)
-#define DSIM_TX_READY_HS_CLK (1 << 10)
-
-#endif /* SOC_SAMSUNG_COMMON_INCLUDE_SOC_DSIM_H */
diff --git a/src/soc/samsung/common/include/soc/i2s-regs.h b/src/soc/samsung/common/include/soc/i2s-regs.h
deleted file mode 100644
index 012ca693bb..0000000000
--- a/src/soc/samsung/common/include/soc/i2s-regs.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* Taken from the kernel code */
-
-#ifndef SOC_SAMSUNG_COMMON_INCLUDE_SOC_I2S_REGS_H
-#define SOC_SAMSUNG_COMMON_INCLUDE_SOC_I2S_REGS_H
-
-#define I2SCON 0x0
-#define I2SMOD 0x4
-#define I2SFIC 0x8
-#define I2SPSR 0xc
-#define I2STXD 0x10
-#define I2SRXD 0x14
-#define I2SFICS 0x18
-#define I2STXDS 0x1c
-#define I2SAHB 0x20
-#define I2SSTR0 0x24
-#define I2SSIZE 0x28
-#define I2STRNCNT 0x2c
-#define I2SLVL0ADDR 0x30
-#define I2SLVL1ADDR 0x34
-#define I2SLVL2ADDR 0x38
-#define I2SLVL3ADDR 0x3c
-
-#define CON_RSTCLR (1 << 31)
-#define CON_FRXOFSTATUS (1 << 26)
-#define CON_FRXORINTEN (1 << 25)
-#define CON_FTXSURSTAT (1 << 24)
-#define CON_FTXSURINTEN (1 << 23)
-#define CON_TXSDMA_PAUSE (1 << 20)
-#define CON_TXSDMA_ACTIVE (1 << 18)
-
-#define CON_FTXURSTATUS (1 << 17)
-#define CON_FTXURINTEN (1 << 16)
-#define CON_TXFIFO2_EMPTY (1 << 15)
-#define CON_TXFIFO1_EMPTY (1 << 14)
-#define CON_TXFIFO2_FULL (1 << 13)
-#define CON_TXFIFO1_FULL (1 << 12)
-
-#define CON_LRINDEX (1 << 11)
-#define CON_TXFIFO_EMPTY (1 << 10)
-#define CON_RXFIFO_EMPTY (1 << 9)
-#define CON_TXFIFO_FULL (1 << 8)
-#define CON_RXFIFO_FULL (1 << 7)
-#define CON_TXDMA_PAUSE (1 << 6)
-#define CON_RXDMA_PAUSE (1 << 5)
-#define CON_TXCH_PAUSE (1 << 4)
-#define CON_RXCH_PAUSE (1 << 3)
-#define CON_TXDMA_ACTIVE (1 << 2)
-#define CON_RXDMA_ACTIVE (1 << 1)
-#define CON_ACTIVE (1 << 0)
-
-#define MOD_OPCLK_CDCLK_OUT (0 << 30)
-#define MOD_OPCLK_CDCLK_IN (1 << 30)
-#define MOD_OPCLK_BCLK_OUT (2 << 30)
-#define MOD_OPCLK_PCLK (3 << 30)
-#define MOD_OPCLK_MASK (3 << 30)
-#define MOD_TXS_IDMA (1 << 28) /* Sec_TXFIFO use I-DMA */
-
-#define MOD_BLCS_SHIFT 26
-#define MOD_BLCS_16BIT (0 << MOD_BLCS_SHIFT)
-#define MOD_BLCS_8BIT (1 << MOD_BLCS_SHIFT)
-#define MOD_BLCS_24BIT (2 << MOD_BLCS_SHIFT)
-#define MOD_BLCS_MASK (3 << MOD_BLCS_SHIFT)
-
-#define MOD_BLCP_SHIFT 24
-#define MOD_BLCP_16BIT (0 << MOD_BLCP_SHIFT)
-#define MOD_BLCP_8BIT (1 << MOD_BLCP_SHIFT)
-#define MOD_BLCP_24BIT (2 << MOD_BLCP_SHIFT)
-#define MOD_BLCP_MASK (3 << MOD_BLCP_SHIFT)
-
-#define MOD_C2DD_HHALF (1 << 21) /* Discard Higher-half */
-#define MOD_C2DD_LHALF (1 << 20) /* Discard Lower-half */
-#define MOD_C1DD_HHALF (1 << 19)
-#define MOD_C1DD_LHALF (1 << 18)
-#define MOD_DC2_EN (1 << 17)
-#define MOD_DC1_EN (1 << 16)
-#define MOD_BLC_16BIT (0 << 13)
-#define MOD_BLC_8BIT (1 << 13)
-#define MOD_BLC_24BIT (2 << 13)
-#define MOD_BLC_MASK (3 << 13)
-
-#define MOD_IMS_SYSMUX (1 << 10)
-#define MOD_SLAVE (1 << 11)
-#define MOD_TXONLY (0 << 8)
-#define MOD_RXONLY (1 << 8)
-#define MOD_TXRX (2 << 8)
-#define MOD_MASK (3 << 8)
-#define MOD_LR_LLOW (0 << 7)
-#define MOD_LR_RLOW (1 << 7)
-#define MOD_SDF_IIS (0 << 5)
-#define MOD_SDF_MSB (1 << 5)
-#define MOD_SDF_LSB (2 << 5)
-#define MOD_SDF_MASK (3 << 5)
-#define MOD_RCLK_256FS (0 << 3)
-#define MOD_RCLK_512FS (1 << 3)
-#define MOD_RCLK_384FS (2 << 3)
-#define MOD_RCLK_768FS (3 << 3)
-#define MOD_RCLK_MASK (3 << 3)
-#define MOD_BCLK_32FS (0 << 1)
-#define MOD_BCLK_48FS (1 << 1)
-#define MOD_BCLK_16FS (2 << 1)
-#define MOD_BCLK_24FS (3 << 1)
-#define MOD_BCLK_MASK (3 << 1)
-#define MOD_8BIT (1 << 0)
-
-#define MOD_CDCLKCON (1 << 12)
-
-#define PSR_PSREN (1 << 15)
-
-#define FIC_TXFLUSH (1 << 15)
-#define FIC_RXFLUSH (1 << 7)
-
-#define AHB_INTENLVL0 (1 << 24)
-#define AHB_LVL0INT (1 << 20)
-#define AHB_CLRLVL0INT (1 << 16)
-#define AHB_DMARLD (1 << 5)
-#define AHB_INTMASK (1 << 3)
-#define AHB_DMAEN (1 << 0)
-#define AHB_LVLINTMASK (0xf << 20)
-
-#define I2SSIZE_TRNMSK (0xffff)
-#define I2SSIZE_SHIFT (16)
-
-#endif /* SOC_SAMSUNG_COMMON_INCLUDE_SOC_I2S_REGS_H */
diff --git a/src/southbridge/amd/common/amd_defs.h b/src/southbridge/amd/common/amd_defs.h
deleted file mode 100644
index ca6b3ca191..0000000000
--- a/src/southbridge/amd/common/amd_defs.h
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef _AMD_SB_DEFS_H_
-#define _AMD_SB_DEFS_H_
-
-#define AMD_SB_ACPI_MMIO_ADDR 0xfed80000ul
-
-#endif
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-18 13:06:22 +0000