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-rw-r--r--src/mainboard/google/brya/variants/brya0/Makefile.inc1
-rw-r--r--src/mainboard/google/brya/variants/brya0/ramstage.c18
2 files changed, 19 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/brya0/Makefile.inc b/src/mainboard/google/brya/variants/brya0/Makefile.inc
index cd8eb69611..646fd095aa 100644
--- a/src/mainboard/google/brya/variants/brya0/Makefile.inc
+++ b/src/mainboard/google/brya/variants/brya0/Makefile.inc
@@ -2,3 +2,4 @@ bootblock-y += gpio.c
ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
ramstage-$(CONFIG_FW_CONFIG) += variant.c
ramstage-y += gpio.c
+ramstage-y += ramstage.c
diff --git a/src/mainboard/google/brya/variants/brya0/ramstage.c b/src/mainboard/google/brya/variants/brya0/ramstage.c
new file mode 100644
index 0000000000..0da8eb101d
--- /dev/null
+++ b/src/mainboard/google/brya/variants/brya0/ramstage.c
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/variants.h>
+#include <device/pci_ids.h>
+
+const struct cpu_power_limits limits[] = {
+ /* SKU_ID, pl1_min, pl1_max, pl2_min, pl2_max */
+ /* PL2 values are for baseline config as per bug:191906315 comment #10 */
+ { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 3000, 15000, 39000, 39000 },
+ { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 4000, 28000, 43000, 43000 },
+ { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 5000, 45000, 80000, 80000 },
+};
+
+void variant_devtree_update(void)
+{
+ size_t total_entries = ARRAY_SIZE(limits);
+ variant_update_power_limits(limits, total_entries);
+}