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-rw-r--r--src/soc/mediatek/common/include/soc/wdt.h2
-rw-r--r--src/soc/mediatek/common/wdt.c4
-rw-r--r--src/soc/mediatek/mt8186/wdt.c9
-rw-r--r--src/soc/mediatek/mt8195/wdt.c2
4 files changed, 10 insertions, 7 deletions
diff --git a/src/soc/mediatek/common/include/soc/wdt.h b/src/soc/mediatek/common/include/soc/wdt.h
index 6b27beffc3..cd43134078 100644
--- a/src/soc/mediatek/common/include/soc/wdt.h
+++ b/src/soc/mediatek/common/include/soc/wdt.h
@@ -39,6 +39,6 @@ enum {
static struct mtk_wdt_regs *const mtk_wdt = (void *)RGU_BASE;
int mtk_wdt_init(void);
-void mtk_wdt_clr_status(uint32_t wdt_sta);
+void mtk_wdt_clr_status(void);
#endif /* SOC_MEDIATEK_COMMON_WDT_H */
diff --git a/src/soc/mediatek/common/wdt.c b/src/soc/mediatek/common/wdt.c
index 6e1b76110d..587e50f04c 100644
--- a/src/soc/mediatek/common/wdt.c
+++ b/src/soc/mediatek/common/wdt.c
@@ -6,7 +6,7 @@
#include <soc/wdt.h>
#include <vendorcode/google/chromeos/chromeos.h>
-__weak void mtk_wdt_clr_status(uint32_t wdt_sta) { /* do nothing */ }
+__weak void mtk_wdt_clr_status(void) { /* do nothing */ }
int mtk_wdt_init(void)
{
@@ -15,7 +15,7 @@ int mtk_wdt_init(void)
/* Writing mode register will clear status register */
wdt_sta = read32(&mtk_wdt->wdt_status);
- mtk_wdt_clr_status(wdt_sta);
+ mtk_wdt_clr_status();
printk(BIOS_INFO, "WDT: Status = %#x\n", wdt_sta);
diff --git a/src/soc/mediatek/mt8186/wdt.c b/src/soc/mediatek/mt8186/wdt.c
index d0e13d98e9..fbc9bb9989 100644
--- a/src/soc/mediatek/mt8186/wdt.c
+++ b/src/soc/mediatek/mt8186/wdt.c
@@ -9,9 +9,12 @@
#include <soc/addressmap.h>
#include <soc/wdt.h>
-#define MTK_WDT_CLR_STATUS 0x22000000
+#define MTK_WDT_CLR_STATUS_VAL 0x22
-void mtk_wdt_clr_status(uint32_t wdt_sta)
+DEFINE_BITFIELD(MTK_WDT_CLR_STATUS, 31, 24)
+
+void mtk_wdt_clr_status(void)
{
- write32(&mtk_wdt->wdt_mode, wdt_sta | MTK_WDT_CLR_STATUS);
+ SET32_BITFIELDS(&mtk_wdt->wdt_mode,
+ MTK_WDT_CLR_STATUS, MTK_WDT_CLR_STATUS_VAL);
}
diff --git a/src/soc/mediatek/mt8195/wdt.c b/src/soc/mediatek/mt8195/wdt.c
index c000bf7494..fcee3db21a 100644
--- a/src/soc/mediatek/mt8195/wdt.c
+++ b/src/soc/mediatek/mt8195/wdt.c
@@ -6,7 +6,7 @@
#define MTK_WDT_CLR_STATUS 0x230001FF
-void mtk_wdt_clr_status(uint32_t wdt_sta)
+void mtk_wdt_clr_status(void)
{
write32(&mtk_wdt->wdt_mode, MTK_WDT_CLR_STATUS);
}