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-rw-r--r--src/mainboard/google/brya/Kconfig5
-rw-r--r--src/mainboard/google/brya/mainboard.asl2
2 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 34d9cbabc6..45e55bf0b4 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -39,6 +39,7 @@ config BOARD_GOOGLE_BRYA_COMMON
config BOARD_GOOGLE_BASEBOARD_BRYA
def_bool n
select BOARD_GOOGLE_BRYA_COMMON
+ select HAVE_SLP_S0_GATE
select MEMORY_SOLDERDOWN if !BOARD_GOOGLE_BANSHEE
select SOC_INTEL_ALDERLAKE_PCH_P
select SYSTEM_TYPE_LAPTOP
@@ -47,6 +48,7 @@ config BOARD_GOOGLE_BASEBOARD_BRASK
def_bool n
select BOARD_GOOGLE_BRYA_COMMON
select ENABLE_TCSS_DISPLAY_DETECTION if RUN_FSP_GOP
+ select HAVE_SLP_S0_GATE
select MEMORY_SODIMM
select RT8168_GEN_ACPI_POWER_RESOURCE
select RT8168_GET_MAC_FROM_VPD
@@ -227,4 +229,7 @@ config MEMORY_SOLDERDOWN
select CHROMEOS_DRAM_PART_NUMBER_IN_CBI if CHROMEOS
select HAVE_SPD_IN_CBFS
+config HAVE_SLP_S0_GATE
+ def_bool n
+
endif # BOARD_GOOGLE_BRYA_COMMON
diff --git a/src/mainboard/google/brya/mainboard.asl b/src/mainboard/google/brya/mainboard.asl
index c60db3081c..8ca694d152 100644
--- a/src/mainboard/google/brya/mainboard.asl
+++ b/src/mainboard/google/brya/mainboard.asl
@@ -2,6 +2,7 @@
#include <baseboard/gpio.h>
+#if CONFIG(HAVE_SLP_S0_GATE)
/*
* S0ix Entry/Exit Notifications
* Called from \_SB.PEPD._DSM
@@ -22,3 +23,4 @@ Method (MS0X, 1, Serialized)
\_SB.PCI0.STXS(GPIO_SLP_S0_GATE);
}
}
+#endif