3 files changed, 20 insertions, 22 deletions
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c
index 774f88f60f..07ba0a0bdf 100644
--- a/src/mainboard/intel/eagleheights/romstage.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
@@ -41,16 +41,11 @@
 #include "superio/intel/i3100/i3100_early_serial.c"
 #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
 #include "northbridge/intel/i3100/i3100.h"
+#include "southbridge/intel/i3100/i3100.h"
 
 #define DEVPRES_CONFIG  (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D3F0)
 #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
 
-/* SATA */
-#define SATA_MAP 0x90
-
-#define SATA_MODE_IDE  0x00
-#define SATA_MODE_AHCI 0x01
-
 #define RCBA_RPC   0x0224 /* 32 bit */
 
 #define RCBA_TCTL  0x3000 /*  8 bit */
diff --git a/src/southbridge/intel/i3100/i3100.h b/src/southbridge/intel/i3100/i3100.h
index d0f5b73449..24087540e0 100644
--- a/src/southbridge/intel/i3100/i3100.h
+++ b/src/southbridge/intel/i3100/i3100.h
@@ -21,6 +21,25 @@
 #define SOUTHBRIDGE_INTEL_I3100_I3100_H
 #include "chip.h"
 
+#define SATA_CMD     0x04
+#define SATA_PI      0x09
+#define SATA_PTIM    0x40
+#define SATA_STIM    0x42
+#define SATA_D1TIM   0x44
+#define SATA_SYNCC   0x48
+#define SATA_SYNCTIM 0x4A
+#define SATA_IIOC    0x54
+#define SATA_MAP     0x90
+#define SATA_PCS     0x91
+#define SATA_ACR0    0xA8
+#define SATA_ACR1    0xAC
+#define SATA_ATC     0xC0
+#define SATA_ATS     0xC4
+#define SATA_SP      0xD0
+
+#define SATA_MODE_IDE  0x00
+#define SATA_MODE_AHCI 0x01
+
 void i3100_enable(device_t dev);
 
 #endif
diff --git a/src/southbridge/intel/i3100/i3100_sata.c b/src/southbridge/intel/i3100/i3100_sata.c
index 14c13da290..af22600f90 100644
--- a/src/southbridge/intel/i3100/i3100_sata.c
+++ b/src/southbridge/intel/i3100/i3100_sata.c
@@ -27,22 +27,6 @@
 #include <device/pci_ops.h>
 #include "i3100.h"
 
-#define SATA_CMD     0x04
-#define SATA_PI      0x09
-#define SATA_PTIM    0x40
-#define SATA_STIM    0x42
-#define SATA_D1TIM   0x44
-#define SATA_SYNCC   0x48
-#define SATA_SYNCTIM 0x4A
-#define SATA_IIOC    0x54
-#define SATA_MAP     0x90
-#define SATA_PCS     0x91
-#define SATA_ACR0    0xA8
-#define SATA_ACR1    0xAC
-#define SATA_ATC     0xC0
-#define SATA_ATS     0xC4
-#define SATA_SP      0xD0
-
 typedef struct southbridge_intel_i3100_config config_t;
 
 static void sata_init(struct device *dev)