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-rw-r--r--src/soc/intel/meteorlake/chip.h7
-rw-r--r--src/soc/intel/meteorlake/romstage/fsp_params.c1
2 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h
index 2c3ec030c8..ec38e80f05 100644
--- a/src/soc/intel/meteorlake/chip.h
+++ b/src/soc/intel/meteorlake/chip.h
@@ -439,6 +439,13 @@ struct soc_intel_meteorlake_config {
/* Gear Selection for SAGV points. 0: Auto, 1: Gear 1, 2: Gear 2, 4: Gear 4 */
uint8_t sagv_gear[MAX_SAGV_POINTS];
+
+ /*
+ * Enable or Disable Reduced BasicMemoryTest size.
+ * Default is set to 0.
+ * Set this to 1 in order to reduce BasicMemoryTest size
+ */
+ bool lower_basic_mem_test_size;
};
typedef struct soc_intel_meteorlake_config config_t;
diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c
index 2a07753abc..d53a0d4da0 100644
--- a/src/soc/intel/meteorlake/romstage/fsp_params.c
+++ b/src/soc/intel/meteorlake/romstage/fsp_params.c
@@ -158,6 +158,7 @@ static void fill_fspm_mrc_params(FSP_M_CONFIG *m_cfg,
m_cfg->RMT = config->rmt;
/* Enable MRC Fast Boot */
m_cfg->MrcFastBoot = 1;
+ m_cfg->LowerBasicMemTestSize = config->lower_basic_mem_test_size;
}
static void fill_fspm_cpu_params(FSP_M_CONFIG *m_cfg,