summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/cezanne/chip.h7
-rw-r--r--src/soc/amd/cezanne/fsp_m_params.c3
2 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/chip.h b/src/soc/amd/cezanne/chip.h
index 83aff05f18..df2059a260 100644
--- a/src/soc/amd/cezanne/chip.h
+++ b/src/soc/amd/cezanne/chip.h
@@ -94,6 +94,13 @@ struct soc_amd_cezanne_config {
GPP_CLK_OFF, /* GPP clk off */
} gpp_clk_config[GPP_CLK_OUTPUT_COUNT];
+ /* performance policy for the PCIe links: power consumption vs. link speed */
+ enum {
+ DXIO_PSPP_PERFORMANCE = 0,
+ DXIO_PSPP_BALANCED,
+ DXIO_PSPP_POWERSAVE,
+ } pspp_policy;
+
uint8_t usb_phy_custom;
struct usb_phy_config usb_phy;
};
diff --git a/src/soc/amd/cezanne/fsp_m_params.c b/src/soc/amd/cezanne/fsp_m_params.c
index 1e6f5ac26b..352aeef582 100644
--- a/src/soc/amd/cezanne/fsp_m_params.c
+++ b/src/soc/amd/cezanne/fsp_m_params.c
@@ -159,6 +159,9 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
mcfg->telemetry_vddcrsocOffset =
config->telemetry_vddcrsocoffset;
+ /* PCIe power vs. speed */
+ mcfg->pspp_policy = config->pspp_policy;
+
mcfg->enable_nb_azalia = devtree_gfx_hda_dev_enabled();
if (config->usb_phy_custom)