diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/x86/Kconfig | 8 | ||||
-rw-r--r-- | src/arch/x86/include/arch/ioapic.h | 4 | ||||
-rw-r--r-- | src/arch/x86/ioapic.c | 17 | ||||
-rw-r--r-- | src/drivers/generic/ioapic/chip.h | 1 | ||||
-rw-r--r-- | src/drivers/generic/ioapic/ioapic.c | 3 | ||||
-rw-r--r-- | src/mainboard/emulation/qemu-q35/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/lenovo/t400/devicetree.cb | 1 | ||||
-rw-r--r-- | src/mainboard/lenovo/x200/devicetree.cb | 1 | ||||
-rw-r--r-- | src/mainboard/roda/rk9/devicetree.cb | 1 | ||||
-rw-r--r-- | src/mainboard/samsung/lumpy/devicetree.cb | 1 | ||||
-rw-r--r-- | src/soc/intel/broadwell/pch/lpc.c | 6 | ||||
-rw-r--r-- | src/soc/intel/common/block/lpc/lpc_lib.c | 6 | ||||
-rw-r--r-- | src/soc/intel/denverton_ns/lpc.c | 6 | ||||
-rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 6 | ||||
-rw-r--r-- | src/southbridge/intel/i82801dx/lpc.c | 6 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/lpc.c | 6 | ||||
-rw-r--r-- | src/southbridge/intel/ibexpeak/lpc.c | 6 | ||||
-rw-r--r-- | src/southbridge/intel/lynxpoint/lpc.c | 6 |
18 files changed, 13 insertions, 73 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index a488b55d0a..6a25daeed2 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -172,14 +172,6 @@ config CMOS_DEFAULT_FILE default "src/mainboard/\$(MAINBOARDDIR)/cmos.default" depends on HAVE_CMOS_DEFAULT -config IOAPIC_INTERRUPTS_ON_FSB - bool - default y if !IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS - -config IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS - bool - default n - config HPET_ADDRESS_OVERRIDE def_bool n diff --git a/src/arch/x86/include/arch/ioapic.h b/src/arch/x86/include/arch/ioapic.h index 839dba4977..372cb79e9f 100644 --- a/src/arch/x86/include/arch/ioapic.h +++ b/src/arch/x86/include/arch/ioapic.h @@ -34,8 +34,8 @@ u8 get_ioapic_version(void *ioapic_base); void setup_ioapic(void *ioapic_base, u8 ioapic_id); void clear_ioapic(void *ioapic_base); -void setup_ioapic_helper(void *ioapic_base, u8 ioapic_id, bool irq_on_fsb, - bool enable_virtual_wire); +void ioapic_set_boot_config(void *ioapic_base, bool irq_on_fsb); +void setup_ioapic_helper(void *ioapic_base, u8 ioapic_id, bool enable_virtual_wire); #endif #endif diff --git a/src/arch/x86/ioapic.c b/src/arch/x86/ioapic.c index dc88de1a8e..d2f65fdaf3 100644 --- a/src/arch/x86/ioapic.c +++ b/src/arch/x86/ioapic.c @@ -119,13 +119,8 @@ u8 get_ioapic_version(void *ioapic_base) return io_apic_read(ioapic_base, 0x01) & 0xff; } -void setup_ioapic_helper(void *ioapic_base, u8 ioapic_id, bool irq_on_fsb, - bool enable_virtual_wire) +void ioapic_set_boot_config(void *ioapic_base, bool irq_on_fsb) { - int first = 0, last; - - set_ioapic_id(ioapic_base, ioapic_id); - if (irq_on_fsb) { /* * For the Pentium 4 and above APICs deliver their interrupts @@ -139,6 +134,13 @@ void setup_ioapic_helper(void *ioapic_base, u8 ioapic_id, bool irq_on_fsb, "IOAPIC: Enabling interrupts on APIC serial bus\n"); io_apic_write(ioapic_base, 0x03, 0); } +} + +void setup_ioapic_helper(void *ioapic_base, u8 ioapic_id, bool enable_virtual_wire) +{ + int first = 0, last; + + set_ioapic_id(ioapic_base, ioapic_id); if (enable_virtual_wire) { route_i8259_irq0(ioapic_base); @@ -152,6 +154,5 @@ void setup_ioapic_helper(void *ioapic_base, u8 ioapic_id, bool irq_on_fsb, void setup_ioapic(void *ioapic_base, u8 ioapic_id) { - setup_ioapic_helper(ioapic_base, ioapic_id, - CONFIG(IOAPIC_INTERRUPTS_ON_FSB), true); + setup_ioapic_helper(ioapic_base, ioapic_id, true); } diff --git a/src/drivers/generic/ioapic/chip.h b/src/drivers/generic/ioapic/chip.h index 88720bbc87..9a9395f714 100644 --- a/src/drivers/generic/ioapic/chip.h +++ b/src/drivers/generic/ioapic/chip.h @@ -6,7 +6,6 @@ typedef struct drivers_generic_ioapic_config { u32 version; u8 apicid; - u8 irq_on_fsb; u8 enable_virtual_wire; u8 have_isa_interrupts; void *base; diff --git a/src/drivers/generic/ioapic/ioapic.c b/src/drivers/generic/ioapic/ioapic.c index 708d9a1a7e..4a8bcf8177 100644 --- a/src/drivers/generic/ioapic/ioapic.c +++ b/src/drivers/generic/ioapic/ioapic.c @@ -13,8 +13,7 @@ static void ioapic_init(struct device *dev) if (!dev->enabled || !config) return; - setup_ioapic_helper(config->base, config->apicid, config->irq_on_fsb, - config->enable_virtual_wire); + setup_ioapic_helper(config->base, config->apicid, config->enable_virtual_wire); } static void ioapic_read_resources(struct device *dev) diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig index 537841ec53..c3b6ea6c54 100644 --- a/src/mainboard/emulation/qemu-q35/Kconfig +++ b/src/mainboard/emulation/qemu-q35/Kconfig @@ -4,7 +4,6 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select CPU_QEMU_X86 select SOUTHBRIDGE_INTEL_I82801IX - select IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS select HAVE_CMOS_DEFAULT select HAVE_OPTION_TABLE # select HAVE_PIRQ_TABLE diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb index 5886aff48c..ae389de5dd 100644 --- a/src/mainboard/lenovo/t400/devicetree.cb +++ b/src/mainboard/lenovo/t400/devicetree.cb @@ -143,7 +143,6 @@ chip northbridge/intel/gm45 chip drivers/generic/ioapic register "have_isa_interrupts" = "1" - register "irq_on_fsb" = "1" register "enable_virtual_wire" = "1" register "base" = "(void *)0xfec00000" device ioapic 2 on end diff --git a/src/mainboard/lenovo/x200/devicetree.cb b/src/mainboard/lenovo/x200/devicetree.cb index 80288bfcac..4db554b50b 100644 --- a/src/mainboard/lenovo/x200/devicetree.cb +++ b/src/mainboard/lenovo/x200/devicetree.cb @@ -133,7 +133,6 @@ chip northbridge/intel/gm45 chip drivers/generic/ioapic register "have_isa_interrupts" = "1" - register "irq_on_fsb" = "1" register "enable_virtual_wire" = "1" register "base" = "(void *)0xfec00000" device ioapic 2 on end diff --git a/src/mainboard/roda/rk9/devicetree.cb b/src/mainboard/roda/rk9/devicetree.cb index 39650537db..0af98373ca 100644 --- a/src/mainboard/roda/rk9/devicetree.cb +++ b/src/mainboard/roda/rk9/devicetree.cb @@ -121,7 +121,6 @@ chip northbridge/intel/gm45 device pci 1f.0 on # LPC bridge chip drivers/generic/ioapic register "have_isa_interrupts" = "1" - register "irq_on_fsb" = "1" register "enable_virtual_wire" = "1" register "base" = "(void *)0xfec00000" device ioapic 2 on end diff --git a/src/mainboard/samsung/lumpy/devicetree.cb b/src/mainboard/samsung/lumpy/devicetree.cb index 716d1b85fb..13a2299086 100644 --- a/src/mainboard/samsung/lumpy/devicetree.cb +++ b/src/mainboard/samsung/lumpy/devicetree.cb @@ -107,7 +107,6 @@ chip northbridge/intel/sandybridge chip drivers/generic/ioapic register "have_isa_interrupts" = "1" - register "irq_on_fsb" = "1" register "enable_virtual_wire" = "1" register "base" = "(void *)0xfec00000" device ioapic 4 on end diff --git a/src/soc/intel/broadwell/pch/lpc.c b/src/soc/intel/broadwell/pch/lpc.c index f62394b4b9..10cc9d8c60 100644 --- a/src/soc/intel/broadwell/pch/lpc.c +++ b/src/soc/intel/broadwell/pch/lpc.c @@ -42,12 +42,6 @@ static void pch_enable_ioapic(struct device *dev) reg32 |= 0x00270000; io_apic_write(VIO_APIC_VADDR, 0x01, reg32); - - /* - * Select Boot Configuration register (0x03) and - * use Processor System Bus (0x01) to deliver interrupts. - */ - io_apic_write(VIO_APIC_VADDR, 0x03, 0x01); } static void enable_hpet(struct device *dev) diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c index 49509409e0..1b6936e508 100644 --- a/src/soc/intel/common/block/lpc/lpc_lib.c +++ b/src/soc/intel/common/block/lpc/lpc_lib.c @@ -290,12 +290,6 @@ void pch_enable_ioapic(void) reg32 |= (redir_entries - 1) << 16; io_apic_write((void *)IO_APIC_ADDR, 0x01, reg32); - - /* - * Select Boot Configuration register (0x03) and - * use Processor System Bus (0x01) to deliver interrupts. - */ - io_apic_write((void *)IO_APIC_ADDR, 0x03, 0x01); } static const uint8_t pch_interrupt_routing[PIRQ_COUNT] = { diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c index 65be16e302..a099c31f2b 100644 --- a/src/soc/intel/denverton_ns/lpc.c +++ b/src/soc/intel/denverton_ns/lpc.c @@ -42,12 +42,6 @@ static void pch_enable_ioapic(struct device *dev) reg32 |= (PCH_LP_REDIR_ETR - 1) << 16; io_apic_write((void *)IO_APIC_ADDR, 0x01, reg32); - - /* - * Select Boot Configuration register (0x03) and - * use Processor System Bus (0x01) to deliver interrupts. - */ - io_apic_write((void *)IO_APIC_ADDR, 0x03, 0x01); } /* interrupt router lookup for internal devices */ diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index cc2eb28720..b4f0c4c5fc 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -48,12 +48,6 @@ static void pch_enable_ioapic(struct device *dev) /* affirm full set of redirection table entries ("write once") */ reg32 = io_apic_read(VIO_APIC_VADDR, 0x01); io_apic_write(VIO_APIC_VADDR, 0x01, reg32); - - /* - * Select Boot Configuration register (0x03) and - * use Processor System Bus (0x01) to deliver interrupts. - */ - io_apic_write(VIO_APIC_VADDR, 0x03, 0x01); } static void pch_enable_serial_irqs(struct device *dev) diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c index f6c04a5d9f..6ff606422b 100644 --- a/src/southbridge/intel/i82801dx/lpc.c +++ b/src/southbridge/intel/i82801dx/lpc.c @@ -50,11 +50,7 @@ static void i82801dx_enable_ioapic(struct device *dev) set_ioapic_id(VIO_APIC_VADDR, 0x02); - /* - * Select Boot Configuration register (0x03) and - * use Processor System Bus (0x01) to deliver interrupts. - */ - io_apic_write(VIO_APIC_VADDR, 0x03, 0x01); + ioapic_set_boot_config(VIO_APIC_VADDR, true); } static void i82801dx_enable_serial_irqs(struct device *dev) diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 9eabf02765..ababe675a9 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -34,12 +34,6 @@ static void i82801gx_enable_ioapic(struct device *dev) { set_ioapic_id(VIO_APIC_VADDR, 0x02); - - /* - * Select Boot Configuration register (0x03) and - * use Processor System Bus (0x01) to deliver interrupts. - */ - io_apic_write(VIO_APIC_VADDR, 0x03, 0x01); } static void i82801gx_enable_serial_irqs(struct device *dev) diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 6092347167..8cc9b42c17 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -40,12 +40,6 @@ static void pch_enable_ioapic(struct device *dev) /* affirm full set of redirection table entries ("write once") */ reg32 = io_apic_read(VIO_APIC_VADDR, 0x01); io_apic_write(VIO_APIC_VADDR, 0x01, reg32); - - /* - * Select Boot Configuration register (0x03) and - * use Processor System Bus (0x01) to deliver interrupts. - */ - io_apic_write(VIO_APIC_VADDR, 0x03, 0x01); } static void pch_enable_serial_irqs(struct device *dev) diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index fb421451f8..01fff14529 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -49,12 +49,6 @@ static void pch_enable_ioapic(struct device *dev) reg32 |= 0x00270000; } io_apic_write(VIO_APIC_VADDR, 0x01, reg32); - - /* - * Select Boot Configuration register (0x03) and - * use Processor System Bus (0x01) to deliver interrupts. - */ - io_apic_write(VIO_APIC_VADDR, 0x03, 0x01); } static void pch_enable_serial_irqs(struct device *dev) |