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-rw-r--r--src/soc/intel/common/block/gpio/gpio.c6
-rw-r--r--src/soc/intel/common/block/include/intelblocks/gpio.h4
2 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c
index db7654537a..8dc92ffb34 100644
--- a/src/soc/intel/common/block/gpio/gpio.c
+++ b/src/soc/intel/common/block/gpio/gpio.c
@@ -787,3 +787,9 @@ bool gpio_get_vw_info(gpio_t pad, unsigned int *vw_index, unsigned int *vw_bit)
return true;
}
+
+unsigned int gpio_get_pad_cpu_portid(gpio_t pad)
+{
+ const struct pad_community *comm = gpio_get_community(pad);
+ return comm->cpu_port;
+}
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio.h b/src/soc/intel/common/block/include/intelblocks/gpio.h
index eab257361e..86a36d5e6b 100644
--- a/src/soc/intel/common/block/include/intelblocks/gpio.h
+++ b/src/soc/intel/common/block/include/intelblocks/gpio.h
@@ -124,6 +124,7 @@ struct pad_community {
uint8_t gpi_status_offset; /* specifies offset in struct
gpi_status */
uint8_t port; /* PCR Port ID */
+ uint8_t cpu_port; /* CPU Port ID */
const struct reset_mapping *reset_map; /* PADRSTCFG logical to
chipset mapping */
size_t num_reset_vals;
@@ -256,5 +257,8 @@ size_t gpio_get_index_in_group(gpio_t pad);
*/
bool gpio_get_vw_info(gpio_t pad, unsigned int *vw_index, unsigned int *vw_bit);
+/* Returns PCR port ID for this pad for the CPU; will be 0 if not available */
+unsigned int gpio_get_pad_cpu_portid(gpio_t pad);
+
#endif
#endif /* _SOC_INTELBLOCKS_GPIO_H_ */