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-rw-r--r--src/arch/x86/include/arch/pci_ops.h10
-rw-r--r--src/northbridge/amd/agesa/family10/northbridge.c6
-rw-r--r--src/northbridge/amd/agesa/family15/northbridge.c7
-rw-r--r--src/northbridge/amd/agesa/family15tn/northbridge.c7
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c6
-rw-r--r--src/northbridge/intel/gm45/northbridge.c6
-rw-r--r--src/northbridge/intel/haswell/northbridge.c6
-rw-r--r--src/northbridge/intel/i5000/northbridge.c6
-rw-r--r--src/northbridge/intel/i945/northbridge.c6
-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c6
-rw-r--r--src/northbridge/intel/sch/northbridge.c6
-rw-r--r--src/northbridge/via/vx900/northbridge.c3
12 files changed, 21 insertions, 54 deletions
diff --git a/src/arch/x86/include/arch/pci_ops.h b/src/arch/x86/include/arch/pci_ops.h
index eca939045f..e6027b7038 100644
--- a/src/arch/x86/include/arch/pci_ops.h
+++ b/src/arch/x86/include/arch/pci_ops.h
@@ -7,9 +7,19 @@ extern const struct pci_bus_operations pci_cf8_conf1;
extern const struct pci_bus_operations pci_ops_mmconf;
#endif
+#if CONFIG_MMCONF_SUPPORT_DEFAULT
+#define pci_bus_default_ops &pci_ops_mmconf
+#else
+#define pci_bus_default_ops &pci_cf8_conf1
+#endif
+
static inline const struct pci_bus_operations *pci_config_default(void)
{
+#if CONFIG_MMCONF_SUPPORT_DEFAULT
+ return &pci_ops_mmconf;
+#else
return &pci_cf8_conf1;
+#endif
}
static inline void pci_set_method(device_t dev)
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c
index 4589f6d9d8..ceb1d50dde 100644
--- a/src/northbridge/amd/agesa/family10/northbridge.c
+++ b/src/northbridge/amd/agesa/family10/northbridge.c
@@ -1142,11 +1142,7 @@ static struct device_operations pci_domain_ops = {
.enable_resources = amdfam10_domain_enable_resources,
.init = NULL,
.scan_bus = amdfam10_domain_scan_bus,
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- .ops_pci_bus = &pci_ops_mmconf,
-#else
- .ops_pci_bus = &pci_cf8_conf1,
-#endif
+ .ops_pci_bus = pci_bus_default_ops,
};
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index 9e5538d1c4..78e996608b 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -863,12 +863,7 @@ static struct device_operations pci_domain_ops = {
.enable_resources = domain_enable_resources,
.init = NULL,
.scan_bus = f15_pci_domain_scan_bus,
-
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- .ops_pci_bus = &pci_ops_mmconf,
-#else
- .ops_pci_bus = &pci_cf8_conf1,
-#endif
+ .ops_pci_bus = pci_bus_default_ops,
};
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index f91f69098b..5eccf435a8 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -849,12 +849,7 @@ static struct device_operations pci_domain_ops = {
.enable_resources = domain_enable_resources,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
-
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- .ops_pci_bus = &pci_ops_mmconf,
-#else
- .ops_pci_bus = &pci_cf8_conf1,
-#endif
+ .ops_pci_bus = pci_bus_default_ops,
};
static void sysconf_init(device_t dev) // first node
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 2228fb5389..3f7ca25ac9 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -1154,11 +1154,7 @@ static struct device_operations pci_domain_ops = {
.enable_resources = NULL,
.init = NULL,
.scan_bus = amdfam10_domain_scan_bus,
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- .ops_pci_bus = &pci_ops_mmconf,
-#else
- .ops_pci_bus = &pci_cf8_conf1,
-#endif
+ .ops_pci_bus = pci_bus_default_ops,
};
static void sysconf_init(device_t dev) // first node
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index 3a4439cc55..687479e807 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -202,11 +202,7 @@ static struct device_operations pci_domain_ops = {
.enable_resources = NULL,
.init = mch_domain_init,
.scan_bus = pci_domain_scan_bus,
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- .ops_pci_bus = &pci_ops_mmconf,
-#else
- .ops_pci_bus = &pci_cf8_conf1,
-#endif
+ .ops_pci_bus = pci_bus_default_ops,
};
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c
index 45d967e788..9f027343e4 100644
--- a/src/northbridge/intel/haswell/northbridge.c
+++ b/src/northbridge/intel/haswell/northbridge.c
@@ -98,11 +98,7 @@ static struct device_operations pci_domain_ops = {
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- .ops_pci_bus = &pci_ops_mmconf,
-#else
- .ops_pci_bus = &pci_cf8_conf1,
-#endif
+ .ops_pci_bus = pci_bus_default_ops,
};
static int get_bar(device_t dev, unsigned int index, u32 *base, u32 *len)
diff --git a/src/northbridge/intel/i5000/northbridge.c b/src/northbridge/intel/i5000/northbridge.c
index 113dc56359..01f150e82b 100644
--- a/src/northbridge/intel/i5000/northbridge.c
+++ b/src/northbridge/intel/i5000/northbridge.c
@@ -168,11 +168,7 @@ static struct device_operations pci_domain_ops = {
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- .ops_pci_bus = &pci_ops_mmconf,
-#else
- .ops_pci_bus = &pci_cf8_conf1,
-#endif
+ .ops_pci_bus = pci_bus_default_ops,
};
static void enable_dev(device_t dev)
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 9d97f0c17a..7e21164276 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -185,11 +185,7 @@ static struct device_operations pci_domain_ops = {
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- .ops_pci_bus = &pci_ops_mmconf,
-#else
- .ops_pci_bus = &pci_cf8_conf1,
-#endif
+ .ops_pci_bus = pci_bus_default_ops,
};
static void mc_read_resources(device_t dev)
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index d8e2e9d6b3..e3290d8985 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -289,11 +289,7 @@ static struct device_operations pci_domain_ops = {
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- .ops_pci_bus = &pci_ops_mmconf,
-#else
- .ops_pci_bus = &pci_cf8_conf1,
-#endif
+ .ops_pci_bus = pci_bus_default_ops,
};
static void mc_read_resources(device_t dev)
diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c
index 06d34d834b..600bd13cd4 100644
--- a/src/northbridge/intel/sch/northbridge.c
+++ b/src/northbridge/intel/sch/northbridge.c
@@ -200,11 +200,7 @@ static struct device_operations pci_domain_ops = {
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- .ops_pci_bus = &pci_ops_mmconf,
-#else
- .ops_pci_bus = &pci_cf8_conf1,
-#endif
+ .ops_pci_bus = pci_bus_default_ops,
};
static void mc_read_resources(device_t dev)
diff --git a/src/northbridge/via/vx900/northbridge.c b/src/northbridge/via/vx900/northbridge.c
index c3c3920f8f..854e17588a 100644
--- a/src/northbridge/via/vx900/northbridge.c
+++ b/src/northbridge/via/vx900/northbridge.c
@@ -304,8 +304,7 @@ static struct device_operations pci_domain_ops = {
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- /* We always run with MMCONF enabled. */
- .ops_pci_bus = &pci_ops_mmconf,
+ .ops_pci_bus = pci_bus_default_ops,
};
static void cpu_bus_init(device_t dev)
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-28 15:29:02 +0000