diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/cannonlake/acpi/pci_irqs.asl | 14 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/acpi/pcie.asl | 162 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/include/soc/irq.h | 8 |
3 files changed, 180 insertions, 4 deletions
diff --git a/src/soc/intel/cannonlake/acpi/pci_irqs.asl b/src/soc/intel/cannonlake/acpi/pci_irqs.asl index 7439a0eb51..d35f4d76b9 100644 --- a/src/soc/intel/cannonlake/acpi/pci_irqs.asl +++ b/src/soc/intel/cannonlake/acpi/pci_irqs.asl @@ -24,6 +24,13 @@ Name (PICP, Package () { Package(){0x001CFFFF, 1, 0, PCIE_2_IRQ }, Package(){0x001CFFFF, 2, 0, PCIE_3_IRQ }, Package(){0x001CFFFF, 3, 0, PCIE_4_IRQ }, +#if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) + /* PCI Express Port 17-24 */ + Package(){0x001BFFFF, 0, 0, PCIE_17_IRQ }, + Package(){0x001BFFFF, 1, 0, PCIE_18_IRQ }, + Package(){0x001BFFFF, 2, 0, PCIE_19_IRQ }, + Package(){0x001BFFFF, 3, 0, PCIE_20_IRQ }, +#endif /* eMMC */ Package(){0x001AFFFF, 0, 0, eMMC_IRQ }, /* SerialIo */ @@ -88,6 +95,13 @@ Name (PICN, Package () { Package () { 0x001CFFFF, 1, 0, 10 }, Package () { 0x001CFFFF, 2, 0, 11 }, Package () { 0x001CFFFF, 3, 0, 11 }, +#if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) + /* D27: PCI Express Port 17-24 */ + Package () { 0x001BFFFF, 0, 0, 11 }, + Package () { 0x001BFFFF, 1, 0, 10 }, + Package () { 0x001BFFFF, 2, 0, 11 }, + Package () { 0x001BFFFF, 3, 0, 11 }, +#endif /* D25: Can't use PIC*/ /* D23 */ Package () { 0x0017FFFF, 0, 0, 11 }, diff --git a/src/soc/intel/cannonlake/acpi/pcie.asl b/src/soc/intel/cannonlake/acpi/pcie.asl index 9c0933f92c..302863baba 100644 --- a/src/soc/intel/cannonlake/acpi/pcie.asl +++ b/src/soc/intel/cannonlake/acpi/pcie.asl @@ -54,7 +54,11 @@ Method (IRQM, 1, Serialized) { Switch (ToInteger (Arg0)) { - Case (Package () { 1, 5, 9, 13 }) { + Case (Package () { 1, 5, 9, 13 +#if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) + , 17, 21 +#endif + }) { If (PICM) { Return (IQAA) } Else { @@ -62,7 +66,11 @@ Method (IRQM, 1, Serialized) { } } - Case (Package () { 2, 6, 10, 14 }) { + Case (Package () { 2, 6, 10, 14 +#if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) + , 18, 22 +#endif + }) { If (PICM) { Return (IQBA) } Else { @@ -70,7 +78,11 @@ Method (IRQM, 1, Serialized) { } } - Case (Package () { 3, 7, 11, 15 }) { + Case (Package () { 3, 7, 11, 15 +#if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) + , 19, 23 +#endif + }) { If (PICM) { Return (IQCA) } Else { @@ -78,7 +90,11 @@ Method (IRQM, 1, Serialized) { } } - Case (Package () { 4, 8, 12, 16 }) { + Case (Package () { 4, 8, 12, 16 +#if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) + , 20, 24 +#endif + }) { If (PICM) { Return (IQDA) } Else { @@ -367,3 +383,141 @@ Device (RP16) Return (IRQM (RPPN)) } } + +#if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) +Device (RP17) +{ + Name (_ADR, 0x001B0000) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP18) +{ + Name (_ADR, 0x001B0001) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP19) +{ + Name (_ADR, 0x001B0002) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP20) +{ + Name (_ADR, 0x001B0003) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP21) +{ + Name (_ADR, 0x001B0004) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP22) +{ + Name (_ADR, 0x001B0005) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP23) +{ + Name (_ADR, 0x001B0006) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP24) +{ + Name (_ADR, 0x001B0007) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} +#endif diff --git a/src/soc/intel/cannonlake/include/soc/irq.h b/src/soc/intel/cannonlake/include/soc/irq.h index 05d4025f25..1aa6036bcc 100644 --- a/src/soc/intel/cannonlake/include/soc/irq.h +++ b/src/soc/intel/cannonlake/include/soc/irq.h @@ -62,6 +62,14 @@ #define PCIE_10_IRQ 17 #define PCIE_11_IRQ 18 #define PCIE_12_IRQ 19 +#define PCIE_14_IRQ 16 +#define PCIE_15_IRQ 17 +#define PCIE_16_IRQ 18 +#define PCIE_17_IRQ 19 +#define PCIE_18_IRQ 16 +#define PCIE_19_IRQ 17 +#define PCIE_20_IRQ 18 +#define PCIE_21_IRQ 19 #define SATA_IRQ 16 |