diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/device/dram/ddr3.c | 6 | ||||
| -rw-r--r-- | src/device/dram/ddr4.c | 4 | ||||
| -rw-r--r-- | src/include/device/dram/ddr3.h | 6 | ||||
| -rw-r--r-- | src/include/device/dram/ddr4.h | 4 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/native_raminit/raminit_native.h | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit.c | 14 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/romstage/raminit.c | 2 |
7 files changed, 19 insertions, 19 deletions
diff --git a/src/device/dram/ddr3.c b/src/device/dram/ddr3.c index 1fa3f4c3b2..8d2752b15c 100644 --- a/src/device/dram/ddr3.c +++ b/src/device/dram/ddr3.c @@ -97,7 +97,7 @@ u16 spd_ddr3_calc_unique_crc(u8 *spd, int len) * SPD_STATUS_INVALID_FIELD -- A field with an invalid value was * detected. */ -int spd_decode_ddr3(struct dimm_attr_ddr3_st *dimm, spd_raw_data spd) +int spd_decode_ddr3(struct dimm_attr_ddr3_st *dimm, spd_ddr3_raw_data spd) { int ret; u16 crc, spd_crc; @@ -122,7 +122,7 @@ int spd_decode_ddr3(struct dimm_attr_ddr3_st *dimm, spd_raw_data spd) dimm->dram_type = SPD_MEMORY_TYPE_SDRAM_DDR3; dimm->dimm_type = spd[3] & 0xf; - crc = spd_ddr3_calc_crc(spd, sizeof(spd_raw_data)); + crc = spd_ddr3_calc_crc(spd, sizeof(spd_ddr3_raw_data)); /* Compare with the CRC in the SPD */ spd_crc = (spd[127] << 8) + spd[126]; /* Verify the CRC is correct */ @@ -390,7 +390,7 @@ int spd_decode_ddr3(struct dimm_attr_ddr3_st *dimm, spd_raw_data spd) * SPD_STATUS_INVALID_FIELD -- A field with an invalid value was * detected. */ -int spd_xmp_decode_ddr3(struct dimm_attr_ddr3_st *dimm, spd_raw_data spd, +int spd_xmp_decode_ddr3(struct dimm_attr_ddr3_st *dimm, spd_ddr3_raw_data spd, enum ddr3_xmp_profile profile) { int ret; diff --git a/src/device/dram/ddr4.c b/src/device/dram/ddr4.c index 37bd4e2770..14b5dd3f1a 100644 --- a/src/device/dram/ddr4.c +++ b/src/device/dram/ddr4.c @@ -70,7 +70,7 @@ const spd_block spd_blocks[] = { {.type = BLOCK_3, 384, 128, 0} }; -static bool verify_block(const spd_block *block, spd_raw_data spd) +static bool verify_block(const spd_block *block, spd_ddr4_raw_data spd) { uint16_t crc, spd_crc; @@ -136,7 +136,7 @@ uint16_t ddr4_speed_mhz_to_reported_mts(uint16_t speed_mhz) * SPD_STATUS_INVALID -- invalid SPD or not a DDR4 SPD * SPD_STATUS_CRC_ERROR -- checksum mismatch */ -int spd_decode_ddr4(struct dimm_attr_ddr4_st *dimm, spd_raw_data spd) +int spd_decode_ddr4(struct dimm_attr_ddr4_st *dimm, spd_ddr4_raw_data spd) { u8 reg8; u8 bus_width, sdram_width; diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h index 6efe0494df..65977b49c1 100644 --- a/src/include/device/dram/ddr3.h +++ b/src/include/device/dram/ddr3.h @@ -153,15 +153,15 @@ enum ddr3_xmp_profile { DDR3_XMP_PROFILE_2 = 1, }; -typedef u8 spd_raw_data[256]; +typedef u8 spd_ddr3_raw_data[SPD_SIZE_MAX_DDR3]; u16 spd_ddr3_calc_crc(u8 *spd, int len); u16 spd_ddr3_calc_unique_crc(u8 *spd, int len); -int spd_decode_ddr3(struct dimm_attr_ddr3_st *dimm, spd_raw_data spd_data); +int spd_decode_ddr3(struct dimm_attr_ddr3_st *dimm, spd_ddr3_raw_data spd_data); int spd_dimm_is_registered_ddr3(enum spd_dimm_type_ddr3 type); void dram_print_spd_ddr3(const struct dimm_attr_ddr3_st *dimm); int spd_xmp_decode_ddr3(struct dimm_attr_ddr3_st *dimm, - spd_raw_data spd, + spd_ddr3_raw_data spd, enum ddr3_xmp_profile profile); enum cb_err spd_add_smbios17(const u8 channel, const u8 slot, const u16 selected_freq, diff --git a/src/include/device/dram/ddr4.h b/src/include/device/dram/ddr4.h index 7210212520..da7359a253 100644 --- a/src/include/device/dram/ddr4.h +++ b/src/include/device/dram/ddr4.h @@ -64,9 +64,9 @@ struct dimm_attr_ddr4_st { bool ecc_extension; }; -typedef u8 spd_raw_data[512]; +typedef u8 spd_ddr4_raw_data[SPD_SIZE_MAX_DDR4]; -int spd_decode_ddr4(struct dimm_attr_ddr4_st *dimm, spd_raw_data spd); +int spd_decode_ddr4(struct dimm_attr_ddr4_st *dimm, spd_ddr4_raw_data spd); enum cb_err spd_add_smbios17_ddr4(const u8 channel, const u8 slot, const u16 selected_freq, diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h index 1a0793947e..2a168666ac 100644 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h @@ -33,7 +33,7 @@ enum generic_stepping { }; struct raminit_dimm_info { - spd_raw_data raw_spd; + spd_ddr3_raw_data raw_spd; struct dimm_attr_ddr3_st data; uint8_t spd_addr; bool valid; diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 2b59b9e6af..2a4eae5bd5 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -123,7 +123,7 @@ static void setup_sdram_meminfo(ramctr_timing *ctrl) } /* Return CRC16 match for all SPDs */ -static int verify_crc16_spds_ddr3(spd_raw_data *spd, ramctr_timing *ctrl) +static int verify_crc16_spds_ddr3(spd_ddr3_raw_data *spd, ramctr_timing *ctrl) { int channel, slot, spd_slot; int match = 1; @@ -132,13 +132,13 @@ static int verify_crc16_spds_ddr3(spd_raw_data *spd, ramctr_timing *ctrl) for (slot = 0; slot < NUM_SLOTS; slot++) { spd_slot = 2 * channel + slot; match &= ctrl->spd_crc[channel][slot] == - spd_ddr3_calc_unique_crc(spd[spd_slot], sizeof(spd_raw_data)); + spd_ddr3_calc_unique_crc(spd[spd_slot], sizeof(spd_ddr3_raw_data)); } } return match; } -static void read_spd(spd_raw_data *spd, u8 addr, bool id_only) +static void read_spd(spd_ddr3_raw_data *spd, u8 addr, bool id_only) { int j; if (id_only) { @@ -150,7 +150,7 @@ static void read_spd(spd_raw_data *spd, u8 addr, bool id_only) } } -static void mainboard_get_spd(spd_raw_data *spd, bool id_only) +static void mainboard_get_spd(spd_ddr3_raw_data *spd, bool id_only) { const struct northbridge_intel_sandybridge_config *cfg = config_of_soc(); unsigned int i; @@ -192,7 +192,7 @@ static void mainboard_get_spd(spd_raw_data *spd, bool id_only) } /* CONFIG(HAVE_SPD_IN_CBFS) */ } -static void dram_find_spds_ddr3(spd_raw_data *spd, ramctr_timing *ctrl) +static void dram_find_spds_ddr3(spd_ddr3_raw_data *spd, ramctr_timing *ctrl) { int dimms = 0, ch_dimms; int channel, slot, spd_slot; @@ -254,7 +254,7 @@ static void dram_find_spds_ddr3(spd_raw_data *spd, ramctr_timing *ctrl) /* Fill in CRC16 for MRC cache */ ctrl->spd_crc[channel][slot] = - spd_ddr3_calc_unique_crc(spd[spd_slot], sizeof(spd_raw_data)); + spd_ddr3_calc_unique_crc(spd[spd_slot], sizeof(spd_ddr3_raw_data)); if (dimm->dram_type != SPD_MEMORY_TYPE_SDRAM_DDR3) { /* Mark DIMM as invalid */ @@ -339,7 +339,7 @@ static void init_dram_ddr3(int s3resume, const u32 cpuid) { int me_uma_size, cbmem_was_inited, fast_boot, err; ramctr_timing ctrl; - spd_raw_data spds[4]; + spd_ddr3_raw_data spds[4]; size_t mrc_size; ramctr_timing *ctrl_cached = NULL; diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c index b64364bed8..6244072c55 100644 --- a/src/soc/intel/baytrail/romstage/raminit.c +++ b/src/soc/intel/baytrail/romstage/raminit.c @@ -59,7 +59,7 @@ static void populate_smbios_tables(void *dram_data, int speed, int num_channels) enum spd_status status; /* Decode into dimm_attr struct */ - status = spd_decode_ddr3(&dimm, *(spd_raw_data *)dram_data); + status = spd_decode_ddr3(&dimm, *(spd_ddr3_raw_data *)dram_data); /* Some SPDs have bad CRCs, nothing we can do about it */ if (status == SPD_STATUS_OK || status == SPD_STATUS_CRC_ERROR) { |