81 files changed, 40 insertions, 40 deletions
diff --git a/src/Kconfig b/src/Kconfig
index d7fff15d3b..f531f070f7 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -335,7 +335,7 @@ source "src/ec/acpi/Kconfig"
 source "src/ec/*/*/Kconfig"
 comment "SoC"
 source "src/soc/*/*/Kconfig"
-source "src/drivers/intel/fsp/Kconfig"
+source "src/drivers/intel/fsp1_0/Kconfig"
 
 endmenu
 
diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc
index da0e76f52c..b0991bc501 100644
--- a/src/cpu/Makefile.inc
+++ b/src/cpu/Makefile.inc
@@ -30,7 +30,7 @@ cpu_ucode_cbfs_file = $(obj)/cpu_microcode_blob.bin
 cbfs_include_ucode = y
 endif
 
-ifeq ($(CONFIG_PLATFORM_USES_FSP), y)
+ifeq ($(CONFIG_PLATFORM_USES_FSP1_0), y)
 cpu_ucode_cbfs_offset = "-b $(CONFIG_CPU_MICROCODE_CBFS_LOC)"
 else
 cpu_ucode_cbfs_offset = "-b"
diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig
index 05bdce4efe..71deb3aa8a 100644
--- a/src/cpu/intel/fsp_model_206ax/Kconfig
+++ b/src/cpu/intel/fsp_model_206ax/Kconfig
@@ -28,7 +28,7 @@ if CPU_INTEL_FSP_MODEL_206AX || CPU_INTEL_FSP_MODEL_306AX
 
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
-	select PLATFORM_USES_FSP
+	select PLATFORM_USES_FSP1_0
 	select ARCH_BOOTBLOCK_X86_32
 	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig
index ec4be847b0..7813969d12 100644
--- a/src/cpu/intel/fsp_model_406dx/Kconfig
+++ b/src/cpu/intel/fsp_model_406dx/Kconfig
@@ -24,7 +24,7 @@ if CPU_INTEL_FSP_MODEL_406DX
 
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
-	select PLATFORM_USES_FSP
+	select PLATFORM_USES_FSP1_0
 	select ARCH_BOOTBLOCK_X86_32
 	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig
index 41c22886c5..21a0fac79c 100644
--- a/src/cpu/x86/Kconfig
+++ b/src/cpu/x86/Kconfig
@@ -105,12 +105,12 @@ config X86_AMD_FIXED_MTRRS
 	  This option informs the MTRR code to use the RdMem and WrMem fields
 	  in the fixed MTRR MSRs.
 
-config PLATFORM_USES_FSP
+config PLATFORM_USES_FSP1_0
 	bool
 	default n
 	help
 	  Selected for Intel processors/platform combinations that use the
-	  Intel Firmware Support Package (FSP) for initialization.
+	  Intel Firmware Support Package (FSP) 1.0 for initialization.
 
 config PARALLEL_MP
 	def_bool n
diff --git a/src/cpu/x86/car.c b/src/cpu/x86/car.c
index 18d74b25c7..342a179bfc 100644
--- a/src/cpu/x86/car.c
+++ b/src/cpu/x86/car.c
@@ -23,8 +23,8 @@
 #include <cbmem.h>
 #include <arch/early_variables.h>
 
-#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP)
-#include <drivers/intel/fsp/fsp_util.h>
+#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_0)
+#include <drivers/intel/fsp1_0/fsp_util.h>
 #endif
 typedef void (* const car_migration_func_t)(void);
 
@@ -67,7 +67,7 @@ void *car_get_var_ptr(void *var)
 		return var;
 	}
 
-#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP)
+#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_0)
 	migrated_base=(char *)find_saved_temp_mem(
 			*(void **)CBMEM_FSP_HOB_PTR);
 #else
@@ -100,7 +100,7 @@ void *car_sync_var_ptr(void *var)
 	if (*mig_var < _car_start || *mig_var > _car_end)
 		return mig_var;
 
-#if !IS_ENABLED(CONFIG_PLATFORM_USES_FSP)
+#if !IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_0)
 	/* Keep console buffer in CAR until cbmemc_reinit() moves it. */
 	if (*mig_var == _car_end)
 		return mig_var;
@@ -149,7 +149,7 @@ static void do_car_migrate_hooks(void)
 
 void car_migrate_variables(void)
 {
-	if (!IS_ENABLED(PLATFORM_USES_FSP))
+	if (!IS_ENABLED(PLATFORM_USES_FSP1_0))
 		do_car_migrate_variables();
 
 	do_car_migrate_hooks();
diff --git a/src/drivers/intel/Makefile.inc b/src/drivers/intel/Makefile.inc
index dba81b553d..dc947ff4f0 100644
--- a/src/drivers/intel/Makefile.inc
+++ b/src/drivers/intel/Makefile.inc
@@ -1,4 +1,4 @@
 subdirs-y += gma
 subdirs-y += wifi
-subdirs-$(CONFIG_PLATFORM_USES_FSP) += fsp
+subdirs-$(CONFIG_PLATFORM_USES_FSP1_0) += fsp1_0
 subdirs-$(CONFIG_DRIVER_INTEL_I210) += i210
diff --git a/src/drivers/intel/fsp/Kconfig b/src/drivers/intel/fsp1_0/Kconfig
index 2d41365320..2492298a81 100644
--- a/src/drivers/intel/fsp/Kconfig
+++ b/src/drivers/intel/fsp1_0/Kconfig
@@ -17,7 +17,7 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 ##
 
-if PLATFORM_USES_FSP
+if PLATFORM_USES_FSP1_0
 
 comment "Intel FSP"
 
@@ -142,4 +142,4 @@ config FSP_USES_UPD
 	default n
 	help
 	  If this FSP uses UPD/VPD data regions, select this in the chipset Kconfig.
-endif #PLATFORM_USES_FSP
+endif #PLATFORM_USES_FSP1_0
diff --git a/src/drivers/intel/fsp/Makefile.inc b/src/drivers/intel/fsp1_0/Makefile.inc
index 71d676d759..4931cb7a7e 100644
--- a/src/drivers/intel/fsp/Makefile.inc
+++ b/src/drivers/intel/fsp1_0/Makefile.inc
@@ -23,10 +23,10 @@ romstage-y += fsp_util.c hob.c
 ramstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c
 romstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c
 
-CPPFLAGS_common += -Isrc/drivers/intel/fsp
+CPPFLAGS_common += -Isrc/drivers/intel/fsp1_0
 
 ifeq ($(CONFIG_USE_GENERIC_FSP_CAR_INC),y)
-cpu_incs += $(src)/drivers/intel/fsp/cache_as_ram.inc
+cpu_incs += $(src)/drivers/intel/fsp1_0/cache_as_ram.inc
 endif
 
 ifeq ($(CONFIG_HAVE_FSP_BIN),y)
diff --git a/src/drivers/intel/fsp/cache_as_ram.inc b/src/drivers/intel/fsp1_0/cache_as_ram.inc
index 8604c3b0b0..8604c3b0b0 100644
--- a/src/drivers/intel/fsp/cache_as_ram.inc
+++ b/src/drivers/intel/fsp1_0/cache_as_ram.inc
diff --git a/src/drivers/intel/fsp/fastboot_cache.c b/src/drivers/intel/fsp1_0/fastboot_cache.c
index bcf39abc7b..bcf39abc7b 100644
--- a/src/drivers/intel/fsp/fastboot_cache.c
+++ b/src/drivers/intel/fsp1_0/fastboot_cache.c
diff --git a/src/drivers/intel/fsp/fsp_util.c b/src/drivers/intel/fsp1_0/fsp_util.c
index a00cb81d64..a00cb81d64 100644
--- a/src/drivers/intel/fsp/fsp_util.c
+++ b/src/drivers/intel/fsp1_0/fsp_util.c
diff --git a/src/drivers/intel/fsp/fsp_util.h b/src/drivers/intel/fsp1_0/fsp_util.h
index d65b842c56..d65b842c56 100644
--- a/src/drivers/intel/fsp/fsp_util.h
+++ b/src/drivers/intel/fsp1_0/fsp_util.h
diff --git a/src/drivers/intel/fsp/fsp_values.h b/src/drivers/intel/fsp1_0/fsp_values.h
index e5098bb9ee..e5098bb9ee 100644
--- a/src/drivers/intel/fsp/fsp_values.h
+++ b/src/drivers/intel/fsp1_0/fsp_values.h
diff --git a/src/drivers/intel/fsp/hob.c b/src/drivers/intel/fsp1_0/hob.c
index 99c4ba16fb..99c4ba16fb 100644
--- a/src/drivers/intel/fsp/hob.c
+++ b/src/drivers/intel/fsp1_0/hob.c
diff --git a/src/mainboard/intel/bayleybay_fsp/romstage.c b/src/mainboard/intel/bayleybay_fsp/romstage.c
index ef848faa23..9a08b080ee 100644
--- a/src/mainboard/intel/bayleybay_fsp/romstage.c
+++ b/src/mainboard/intel/bayleybay_fsp/romstage.c
@@ -36,7 +36,7 @@
 #include <baytrail/romstage.h>
 #include <baytrail/acpi.h>
 #include <baytrail/baytrail.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
 
 /**
  * /brief mainboard call for setup that needs to be done before fsp init
diff --git a/src/mainboard/intel/minnowmax/romstage.c b/src/mainboard/intel/minnowmax/romstage.c
index d8fd04ae99..656c7b4100 100644
--- a/src/mainboard/intel/minnowmax/romstage.c
+++ b/src/mainboard/intel/minnowmax/romstage.c
@@ -20,7 +20,7 @@
  */
 
 #include <baytrail/romstage.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <baytrail/gpio.h>
diff --git a/src/mainboard/intel/mohonpeak/romstage.c b/src/mainboard/intel/mohonpeak/romstage.c
index e06682ccd8..6218e3848d 100644
--- a/src/mainboard/intel/mohonpeak/romstage.c
+++ b/src/mainboard/intel/mohonpeak/romstage.c
@@ -23,7 +23,7 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
 #include <southbridge/intel/fsp_rangeley/soc.h>
 #include <southbridge/intel/fsp_rangeley/gpio.h>
 #include <southbridge/intel/fsp_rangeley/romstage.h>
diff --git a/src/mainboard/siemens/mc_tcu3/romstage.c b/src/mainboard/siemens/mc_tcu3/romstage.c
index 5274529684..2866a2c6a1 100644
--- a/src/mainboard/siemens/mc_tcu3/romstage.c
+++ b/src/mainboard/siemens/mc_tcu3/romstage.c
@@ -36,7 +36,7 @@
 #include <baytrail/romstage.h>
 #include <baytrail/acpi.h>
 #include <baytrail/baytrail.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
 #include "modhwinfo.h"
 
 /**
diff --git a/src/northbridge/intel/fsp_rangeley/chip.h b/src/northbridge/intel/fsp_rangeley/chip.h
index a8d0a1f137..02a69b950f 100644
--- a/src/northbridge/intel/fsp_rangeley/chip.h
+++ b/src/northbridge/intel/fsp_rangeley/chip.h
@@ -22,7 +22,7 @@
 #define _FSP_RANGELEY_CHIP_H_
 
 #include <arch/acpi.h>
-#include <drivers/intel/fsp/fsp_values.h>
+#include <drivers/intel/fsp1_0/fsp_values.h>
 
 struct northbridge_intel_fsp_rangeley_config {
 
diff --git a/src/northbridge/intel/fsp_rangeley/fsp/Kconfig b/src/northbridge/intel/fsp_rangeley/fsp/Kconfig
index 82ecedaf7b..82d62c53ca 100644
--- a/src/northbridge/intel/fsp_rangeley/fsp/Kconfig
+++ b/src/northbridge/intel/fsp_rangeley/fsp/Kconfig
@@ -19,7 +19,7 @@
 
 config RANGELEY_FSP_SPECIFIC_OPTIONS
 	def_bool y
-	select PLATFORM_USES_FSP
+	select PLATFORM_USES_FSP1_0
 	select USE_GENERIC_FSP_CAR_INC
 	select FSP_USES_UPD
 	select ENABLE_MRC_CACHE #rangeley FSP always needs MRC data
diff --git a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
index 949cf2a767..3a4cd6ec1b 100644
--- a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
+++ b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
@@ -25,7 +25,7 @@
 #include <cbmem.h>
 #include <device/device.h>
 #include <southbridge/intel/fsp_rangeley/pci_devs.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
 #include <fspvpd.h>
 #include <fspbootmode.h>
 #include <reset.h>
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.c b/src/northbridge/intel/fsp_rangeley/northbridge.c
index be3a3acfb8..14d0853de7 100644
--- a/src/northbridge/intel/fsp_rangeley/northbridge.c
+++ b/src/northbridge/intel/fsp_rangeley/northbridge.c
@@ -35,7 +35,7 @@
 #include <cbmem.h>
 #include "chip.h"
 #include "northbridge.h"
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
 #include <cpu/x86/lapic.h>
 
 static int bridge_revision_id = -1;
diff --git a/src/northbridge/intel/fsp_rangeley/raminit.c b/src/northbridge/intel/fsp_rangeley/raminit.c
index 9626745e47..c920f9df21 100644
--- a/src/northbridge/intel/fsp_rangeley/raminit.c
+++ b/src/northbridge/intel/fsp_rangeley/raminit.c
@@ -24,7 +24,7 @@
 #include <cbmem.h>
 #include <device/pci_def.h>
 #include "northbridge.h"
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
 
 static uintptr_t smm_region_start(void)
 {
diff --git a/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig b/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig
index 03999618fc..0b4ca972e2 100644
--- a/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig
+++ b/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig
@@ -19,7 +19,7 @@
 
 config SANDYBRIDGE_FSP_SPECIFIC_OPTIONS
 	def_bool y
-	select PLATFORM_USES_FSP
+	select PLATFORM_USES_FSP1_0
 	select USE_GENERIC_FSP_CAR_INC
 	select FSP_USES_UPD if SOUTHBRIDGE_INTEL_FSP_I89XX
 
diff --git a/src/soc/intel/fsp_baytrail/baytrail/romstage.h b/src/soc/intel/fsp_baytrail/baytrail/romstage.h
index a800600626..1f421df3fd 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/romstage.h
+++ b/src/soc/intel/fsp_baytrail/baytrail/romstage.h
@@ -29,7 +29,7 @@ void report_platform_info(void);
 
 #include <stdint.h>
 #include <arch/cpu.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
 
 void main(FSP_INFO_HEADER *fsp_info_header);
 void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr);
diff --git a/src/soc/intel/fsp_baytrail/chip.c b/src/soc/intel/fsp_baytrail/chip.c
index 732d1dcd1e..d26b64aa96 100644
--- a/src/soc/intel/fsp_baytrail/chip.c
+++ b/src/soc/intel/fsp_baytrail/chip.c
@@ -22,7 +22,7 @@
 #include <device/pci.h>
 #include <baytrail/pci_devs.h>
 #include <baytrail/ramstage.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
 #include "chip.h"
 
 static void pci_domain_set_resources(device_t dev)
diff --git a/src/soc/intel/fsp_baytrail/chip.h b/src/soc/intel/fsp_baytrail/chip.h
index 6e83ef236f..9a2edfeb33 100644
--- a/src/soc/intel/fsp_baytrail/chip.h
+++ b/src/soc/intel/fsp_baytrail/chip.h
@@ -23,7 +23,7 @@
 #define _FSP_BAYTRAIL_CHIP_H_
 
 #include <arch/acpi.h>
-#include <drivers/intel/fsp/fsp_values.h>
+#include <drivers/intel/fsp1_0/fsp_values.h>
 
 /* The devicetree parser expects chip.h to reside directly in the path
  * specified by the devicetree. */
diff --git a/src/soc/intel/fsp_baytrail/fsp/Kconfig b/src/soc/intel/fsp_baytrail/fsp/Kconfig
index cbe3a95ff0..252c41f50d 100644
--- a/src/soc/intel/fsp_baytrail/fsp/Kconfig
+++ b/src/soc/intel/fsp_baytrail/fsp/Kconfig
@@ -19,7 +19,7 @@
 
 config BAYTRAIL_FSP_SPECIFIC_OPTIONS
 	def_bool y
-	select PLATFORM_USES_FSP
+	select PLATFORM_USES_FSP1_0
 	select USE_GENERIC_FSP_CAR_INC
 	select FSP_USES_UPD
 
diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
index b8c1bf6caa..eb068bab36 100644
--- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
+++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
@@ -26,7 +26,7 @@
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <baytrail/pci_devs.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
 #include "../chip.h"
 #include <arch/io.h>
 #include <baytrail/reset.h>
diff --git a/src/soc/intel/fsp_baytrail/memmap.c b/src/soc/intel/fsp_baytrail/memmap.c
index 480bbeba62..5f31430914 100644
--- a/src/soc/intel/fsp_baytrail/memmap.c
+++ b/src/soc/intel/fsp_baytrail/memmap.c
@@ -22,7 +22,7 @@
 #include <cbmem.h>
 #include <baytrail/iosf.h>
 #include <baytrail/smm.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
 
 uintptr_t smm_region_start(void)
 {
diff --git a/src/soc/intel/fsp_baytrail/northcluster.c b/src/soc/intel/fsp_baytrail/northcluster.c
index b288388db2..2238a8abe3 100644
--- a/src/soc/intel/fsp_baytrail/northcluster.c
+++ b/src/soc/intel/fsp_baytrail/northcluster.c
@@ -31,7 +31,7 @@
 #include <device/pci.h>
 #include <cbmem.h>
 #include <baytrail/baytrail.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
 
 
 static const int legacy_hole_base_k = 0xa0000 / 1024;
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c
index 81a02795ab..3c4098f8fd 100644
--- a/src/soc/intel/fsp_baytrail/romstage/romstage.c
+++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c
@@ -37,7 +37,7 @@
 #include <baytrail/romstage.h>
 #include <baytrail/acpi.h>
 #include <baytrail/baytrail.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
 #include <baytrail/pmc.h>
 #include <baytrail/spi.h>
 #include <version.h>
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c
index e6b4f62d7e..9596c7c7ac 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.c
+++ b/src/southbridge/intel/fsp_rangeley/romstage.c
@@ -29,7 +29,7 @@
 #include <pc80/mc146818rtc.h>
 #include <cbmem.h>
 #include <console/console.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
 #include "northbridge/intel/fsp_rangeley/northbridge.h"
 #include "southbridge/intel/fsp_rangeley/soc.h"
 #include "southbridge/intel/fsp_rangeley/gpio.h"
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.h b/src/southbridge/intel/fsp_rangeley/romstage.h
index 4afce5f821..a421953c61 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.h
+++ b/src/southbridge/intel/fsp_rangeley/romstage.h
@@ -27,7 +27,7 @@
 
 #include <stdint.h>
 #include <arch/cpu.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
 
 void main(FSP_INFO_HEADER *fsp_info_header);
 void early_mainboard_romstage_entry(void);
diff --git a/src/vendorcode/intel/Kconfig b/src/vendorcode/intel/Kconfig
index 21b48ae4d7..312f4de998 100644
--- a/src/vendorcode/intel/Kconfig
+++ b/src/vendorcode/intel/Kconfig
@@ -19,7 +19,7 @@
 
 config FSP_VENDORCODE_HEADER_PATH
 	string
-	default "fsp/ivybridge_bd82x6x" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_BD82X6X
-	default "fsp/ivybridge_i89xx" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_I89XX
-	default "fsp/baytrail" if SOC_INTEL_FSP_BAYTRAIL
-	default "fsp/rangeley" if CPU_INTEL_FSP_MODEL_406DX
+	default "fsp1_0/ivybridge_bd82x6x" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_BD82X6X
+	default "fsp1_0/ivybridge_i89xx" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_I89XX
+	default "fsp1_0/baytrail" if SOC_INTEL_FSP_BAYTRAIL
+	default "fsp1_0/rangeley" if CPU_INTEL_FSP_MODEL_406DX
diff --git a/src/vendorcode/intel/fsp/baytrail/absf/minnowmax_1gb.absf b/src/vendorcode/intel/fsp1_0/baytrail/absf/minnowmax_1gb.absf
index 66ab0d774c..66ab0d774c 100644
--- a/src/vendorcode/intel/fsp/baytrail/absf/minnowmax_1gb.absf
+++ b/src/vendorcode/intel/fsp1_0/baytrail/absf/minnowmax_1gb.absf
diff --git a/src/vendorcode/intel/fsp/baytrail/absf/minnowmax_2gb.absf b/src/vendorcode/intel/fsp1_0/baytrail/absf/minnowmax_2gb.absf
index 6992fe7dce..6992fe7dce 100644
--- a/src/vendorcode/intel/fsp/baytrail/absf/minnowmax_2gb.absf
+++ b/src/vendorcode/intel/fsp1_0/baytrail/absf/minnowmax_2gb.absf
diff --git a/src/vendorcode/intel/fsp/baytrail/include/azalia.h b/src/vendorcode/intel/fsp1_0/baytrail/include/azalia.h
index c58cf4ce4c..c58cf4ce4c 100644
--- a/src/vendorcode/intel/fsp/baytrail/include/azalia.h
+++ b/src/vendorcode/intel/fsp1_0/baytrail/include/azalia.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fsp.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fsp.h
index f2e1d8fabf..f2e1d8fabf 100644
--- a/src/vendorcode/intel/fsp/baytrail/include/fsp.h
+++ b/src/vendorcode/intel/fsp1_0/baytrail/include/fsp.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fspapi.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspapi.h
index 26afc0efdf..26afc0efdf 100644
--- a/src/vendorcode/intel/fsp/baytrail/include/fspapi.h
+++ b/src/vendorcode/intel/fsp1_0/baytrail/include/fspapi.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fspffs.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspffs.h
index f3b83b2a3e..f3b83b2a3e 100644
--- a/src/vendorcode/intel/fsp/baytrail/include/fspffs.h
+++ b/src/vendorcode/intel/fsp1_0/baytrail/include/fspffs.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fspfv.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspfv.h
index 26c00f266a..26c00f266a 100644
--- a/src/vendorcode/intel/fsp/baytrail/include/fspfv.h
+++ b/src/vendorcode/intel/fsp1_0/baytrail/include/fspfv.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fsphob.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fsphob.h
index 7edef0d69e..7edef0d69e 100644
--- a/src/vendorcode/intel/fsp/baytrail/include/fsphob.h
+++ b/src/vendorcode/intel/fsp1_0/baytrail/include/fsphob.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fspinfoheader.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspinfoheader.h
index b277bcd5f7..b277bcd5f7 100644
--- a/src/vendorcode/intel/fsp/baytrail/include/fspinfoheader.h
+++ b/src/vendorcode/intel/fsp1_0/baytrail/include/fspinfoheader.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fspplatform.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspplatform.h
index 81f7b66a4a..81f7b66a4a 100644
--- a/src/vendorcode/intel/fsp/baytrail/include/fspplatform.h
+++ b/src/vendorcode/intel/fsp1_0/baytrail/include/fspplatform.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fsptypes.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fsptypes.h
index 4a313adc5d..4a313adc5d 100644
--- a/src/vendorcode/intel/fsp/baytrail/include/fsptypes.h
+++ b/src/vendorcode/intel/fsp1_0/baytrail/include/fsptypes.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fspvpd.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspvpd.h
index b001cdb28c..b001cdb28c 100644
--- a/src/vendorcode/intel/fsp/baytrail/include/fspvpd.h
+++ b/src/vendorcode/intel/fsp1_0/baytrail/include/fspvpd.h
diff --git a/src/vendorcode/intel/fsp/baytrail/srx/board_fsp.c b/src/vendorcode/intel/fsp1_0/baytrail/srx/board_fsp.c
index 2cb3492fa4..2cb3492fa4 100644
--- a/src/vendorcode/intel/fsp/baytrail/srx/board_fsp.c
+++ b/src/vendorcode/intel/fsp1_0/baytrail/srx/board_fsp.c
diff --git a/src/vendorcode/intel/fsp/baytrail/srx/fsphob.c b/src/vendorcode/intel/fsp1_0/baytrail/srx/fsphob.c
index 5d6e890300..5d6e890300 100644
--- a/src/vendorcode/intel/fsp/baytrail/srx/fsphob.c
+++ b/src/vendorcode/intel/fsp1_0/baytrail/srx/fsphob.c
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspapi.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspapi.h
index 952073603b..952073603b 100644
--- a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspapi.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspapi.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspffs.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspffs.h
index 7a7c367c76..7a7c367c76 100644
--- a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspffs.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspffs.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspfv.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspfv.h
index 75d17faa6a..75d17faa6a 100644
--- a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspfv.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspfv.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fsphob.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fsphob.h
index 58409074bc..58409074bc 100644
--- a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fsphob.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fsphob.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspinfoheader.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspinfoheader.h
index 0f7b3a9d63..0f7b3a9d63 100644
--- a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspinfoheader.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspinfoheader.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspplatform.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspplatform.h
index 06cf67ee7c..06cf67ee7c 100644
--- a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspplatform.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspplatform.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fsptypes.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fsptypes.h
index a3a54c0d2f..a3a54c0d2f 100644
--- a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fsptypes.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fsptypes.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/mem_config.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/mem_config.h
index 26deb90075..26deb90075 100644
--- a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/mem_config.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/mem_config.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/peifsp.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/peifsp.h
index dc3e60f1fc..dc3e60f1fc 100644
--- a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/peifsp.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/peifsp.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/srx/fsphob.c b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/srx/fsphob.c
index 4214b3ae22..4214b3ae22 100644
--- a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/srx/fsphob.c
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/srx/fsphob.c
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsp_vpd.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsp_vpd.h
index fdee5f4d9c..fdee5f4d9c 100644
--- a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsp_vpd.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsp_vpd.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspapi.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspapi.h
index 18a1582a27..18a1582a27 100644
--- a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspapi.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspapi.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspffs.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspffs.h
index 7a7c367c76..7a7c367c76 100644
--- a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspffs.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspffs.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspfv.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspfv.h
index 75d17faa6a..75d17faa6a 100644
--- a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspfv.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspfv.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsphob.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsphob.h
index 58409074bc..58409074bc 100644
--- a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsphob.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsphob.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspinfoheader.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspinfoheader.h
index 0f7b3a9d63..0f7b3a9d63 100644
--- a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspinfoheader.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspinfoheader.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspplatform.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspplatform.h
index e78ac47a25..e78ac47a25 100644
--- a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspplatform.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspplatform.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsptypes.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsptypes.h
index a3a54c0d2f..a3a54c0d2f 100644
--- a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsptypes.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsptypes.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/mem_config.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/mem_config.h
index 26deb90075..26deb90075 100644
--- a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/mem_config.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/mem_config.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/peifsp.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/peifsp.h
index dc3e60f1fc..dc3e60f1fc 100644
--- a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/peifsp.h
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/peifsp.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/srx/fsphob.c b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/srx/fsphob.c
index 4214b3ae22..4214b3ae22 100644
--- a/src/vendorcode/intel/fsp/ivybridge_i89xx/srx/fsphob.c
+++ b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/srx/fsphob.c
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fspapi.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspapi.h
index 5009246db4..5009246db4 100644
--- a/src/vendorcode/intel/fsp/rangeley/include/fspapi.h
+++ b/src/vendorcode/intel/fsp1_0/rangeley/include/fspapi.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fspbootmode.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspbootmode.h
index 16cddf073d..16cddf073d 100644
--- a/src/vendorcode/intel/fsp/rangeley/include/fspbootmode.h
+++ b/src/vendorcode/intel/fsp1_0/rangeley/include/fspbootmode.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fspffs.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspffs.h
index 9e8244dc17..9e8244dc17 100644
--- a/src/vendorcode/intel/fsp/rangeley/include/fspffs.h
+++ b/src/vendorcode/intel/fsp1_0/rangeley/include/fspffs.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fspfv.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspfv.h
index 9688cf472e..9688cf472e 100644
--- a/src/vendorcode/intel/fsp/rangeley/include/fspfv.h
+++ b/src/vendorcode/intel/fsp1_0/rangeley/include/fspfv.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fsphob.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fsphob.h
index 0f743b50d4..0f743b50d4 100644
--- a/src/vendorcode/intel/fsp/rangeley/include/fsphob.h
+++ b/src/vendorcode/intel/fsp1_0/rangeley/include/fsphob.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fspinfoheader.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspinfoheader.h
index 28382cf20e..28382cf20e 100644
--- a/src/vendorcode/intel/fsp/rangeley/include/fspinfoheader.h
+++ b/src/vendorcode/intel/fsp1_0/rangeley/include/fspinfoheader.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fspplatform.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspplatform.h
index ce479bf9f8..ce479bf9f8 100644
--- a/src/vendorcode/intel/fsp/rangeley/include/fspplatform.h
+++ b/src/vendorcode/intel/fsp1_0/rangeley/include/fspplatform.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fsptypes.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fsptypes.h
index 5912e0115b..5912e0115b 100644
--- a/src/vendorcode/intel/fsp/rangeley/include/fsptypes.h
+++ b/src/vendorcode/intel/fsp1_0/rangeley/include/fsptypes.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fspvpd.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspvpd.h
index fba38a0e25..fba38a0e25 100644
--- a/src/vendorcode/intel/fsp/rangeley/include/fspvpd.h
+++ b/src/vendorcode/intel/fsp1_0/rangeley/include/fspvpd.h
diff --git a/src/vendorcode/intel/fsp/rangeley/srx/fsphob.c b/src/vendorcode/intel/fsp1_0/rangeley/srx/fsphob.c
index 4986d52436..4986d52436 100644
--- a/src/vendorcode/intel/fsp/rangeley/srx/fsphob.c
+++ b/src/vendorcode/intel/fsp1_0/rangeley/srx/fsphob.c