summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c8
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c8
-rw-r--r--src/southbridge/intel/i82801ix/lpc.c8
-rw-r--r--src/southbridge/intel/i82801jx/lpc.c8
-rw-r--r--src/southbridge/intel/ibexpeak/lpc.c8
-rw-r--r--src/southbridge/intel/lynxpoint/lpc.c8
6 files changed, 0 insertions, 48 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 5f0dd8c299..e7b7db86d8 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -43,8 +43,6 @@
#define NMI_OFF 0
-#define ENABLE_ACPI_MODE_IN_COREBOOT 0
-
typedef struct southbridge_intel_bd82x6x_config config_t;
/**
@@ -421,15 +419,9 @@ static void enable_clock_gating(struct device *dev)
static void pch_set_acpi_mode(void)
{
if (!acpi_is_wakeup_s3() && CONFIG(HAVE_SMI_HANDLER)) {
-#if ENABLE_ACPI_MODE_IN_COREBOOT
- printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n");
- outb(APM_CNT_ACPI_ENABLE, APM_CNT); // Enable ACPI mode
- printk(BIOS_DEBUG, "done.\n");
-#else
printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode
printk(BIOS_DEBUG, "done.\n");
-#endif
}
}
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 670c2f8ad1..7ba9492d50 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -41,8 +41,6 @@
#define NMI_OFF 0
-#define ENABLE_ACPI_MODE_IN_COREBOOT 0
-
typedef struct southbridge_intel_i82801gx_config config_t;
/**
@@ -338,15 +336,9 @@ static void enable_clock_gating(void)
static void i82801gx_set_acpi_mode(struct device *dev)
{
if (!acpi_is_wakeup_s3()) {
-#if ENABLE_ACPI_MODE_IN_COREBOOT
- printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n");
- outb(APM_CNT_ACPI_ENABLE, APM_CNT); // Enable ACPI mode
- printk(BIOS_DEBUG, "done.\n");
-#else
printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode
printk(BIOS_DEBUG, "done.\n");
-#endif
} else {
printk(BIOS_DEBUG, "S3 wakeup, enabling ACPI via APMC\n");
outb(APM_CNT_ACPI_ENABLE, APM_CNT);
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index a79ade7291..16763bc71a 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -39,8 +39,6 @@
#define NMI_OFF 0
-#define ENABLE_ACPI_MODE_IN_COREBOOT 0
-
typedef struct southbridge_intel_i82801ix_config config_t;
static void i82801ix_enable_apic(struct device *dev)
@@ -370,15 +368,9 @@ static void enable_clock_gating(void)
static void i82801ix_set_acpi_mode(struct device *dev)
{
if (!acpi_is_wakeup_s3()) {
-#if ENABLE_ACPI_MODE_IN_COREBOOT
- printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n");
- outb(APM_CNT_ACPI_ENABLE, APM_CNT); // Enable ACPI mode
- printk(BIOS_DEBUG, "done.\n");
-#else
printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode
printk(BIOS_DEBUG, "done.\n");
-#endif
} else {
printk(BIOS_DEBUG, "S3 wakeup, enabling ACPI via APMC\n");
outb(APM_CNT_ACPI_ENABLE, APM_CNT);
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index a39506976e..3e11a0887a 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -40,8 +40,6 @@
#define NMI_OFF 0
-#define ENABLE_ACPI_MODE_IN_COREBOOT 0
-
typedef struct southbridge_intel_i82801jx_config config_t;
static void i82801jx_enable_apic(struct device *dev)
@@ -375,15 +373,9 @@ static void enable_clock_gating(void)
static void i82801jx_set_acpi_mode(struct device *dev)
{
if (!acpi_is_wakeup_s3()) {
-#if ENABLE_ACPI_MODE_IN_COREBOOT
- printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n");
- outb(APM_CNT_ACPI_ENABLE, APM_CNT); // Enable ACPI mode
- printk(BIOS_DEBUG, "done.\n");
-#else
printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode
printk(BIOS_DEBUG, "done.\n");
-#endif
} else {
printk(BIOS_DEBUG, "S3 wakeup, enabling ACPI via APMC\n");
outb(APM_CNT_ACPI_ENABLE, APM_CNT);
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index 64be11e9f9..2b48eab5b0 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -43,8 +43,6 @@
#define NMI_OFF 0
-#define ENABLE_ACPI_MODE_IN_COREBOOT 0
-
typedef struct southbridge_intel_ibexpeak_config config_t;
/**
@@ -431,15 +429,9 @@ static void enable_clock_gating(struct device *dev)
static void pch_set_acpi_mode(void)
{
if (!acpi_is_wakeup_s3() && CONFIG(HAVE_SMI_HANDLER)) {
-#if ENABLE_ACPI_MODE_IN_COREBOOT
- printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n");
- outb(APM_CNT_ACPI_ENABLE, APM_CNT); // Enable ACPI mode
- printk(BIOS_DEBUG, "done.\n");
-#else
printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode
printk(BIOS_DEBUG, "done.\n");
-#endif
}
}
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index a1e026200b..c8e91c35a9 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -41,8 +41,6 @@
#define NMI_OFF 0
-#define ENABLE_ACPI_MODE_IN_COREBOOT 0
-
typedef struct southbridge_intel_lynxpoint_config config_t;
/**
@@ -493,15 +491,9 @@ static void enable_lp_clock_gating(struct device *dev)
static void pch_set_acpi_mode(void)
{
if (CONFIG(HAVE_SMI_HANDLER) && !acpi_is_wakeup_s3()) {
-#if ENABLE_ACPI_MODE_IN_COREBOOT
- printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n");
- outb(APM_CNT_ACPI_ENABLE, APM_CNT);
- printk(BIOS_DEBUG, "done.\n");
-#else
printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
outb(APM_CNT_ACPI_DISABLE, APM_CNT);
printk(BIOS_DEBUG, "done.\n");
-#endif
}
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-14 05:04:12 +0000