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-rw-r--r--src/drivers/intel/fsp1_1/cache_as_ram.inc18
-rw-r--r--src/drivers/intel/fsp1_1/fsp_util.c4
2 files changed, 0 insertions, 22 deletions
diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.inc b/src/drivers/intel/fsp1_1/cache_as_ram.inc
index f56d841380..6af30ce5e5 100644
--- a/src/drivers/intel/fsp1_1/cache_as_ram.inc
+++ b/src/drivers/intel/fsp1_1/cache_as_ram.inc
@@ -33,24 +33,6 @@
#include <cpu/x86/post_code.h>
#include <cbmem.h>
-#ifndef CONFIG_FSP_LOC
-# error "CONFIG_FSP_LOC must be set."
-#endif
-
-#ifndef CONFIG_POST_IO
-# error "CONFIG_POST_IO must be set."
-#endif
-
-#if IS_ENABLED(CONFIG_POST_IO)
-# ifndef CONFIG_POST_IO_PORT
-# error "CONFIG_POST_IO_PORT must be set."
-# endif
-#endif
-
-#ifndef CONFIG_CPU_MICROCODE_CBFS_LOC
-# error "CONFIG_CPU_MICROCODE_CBFS_LOC must be set."
-#endif
-
#define LHLT_DELAY 0x50000 /* I/O delay between post codes on failure */
/*
diff --git a/src/drivers/intel/fsp1_1/fsp_util.c b/src/drivers/intel/fsp1_1/fsp_util.c
index 51ddc67de3..e5624b3c43 100644
--- a/src/drivers/intel/fsp1_1/fsp_util.c
+++ b/src/drivers/intel/fsp1_1/fsp_util.c
@@ -38,10 +38,6 @@ FSP_INFO_HEADER *find_fsp(void)
} fsp_ptr;
u32 *image_id;
-#ifndef CONFIG_FSP_LOC
-#error "CONFIG_FSP_LOC must be set."
-#endif
-
for (;;) {
/* Get the FSP binary base address in CBFS */
fsp_ptr.u8 = (u8 *)CONFIG_FSP_LOC;