aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/alderlake/Kconfig1
-rw-r--r--src/soc/intel/alderlake/Makefile.inc4
2 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 5facb85339..406e03c24c 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -111,7 +111,6 @@ config SOC_INTEL_ALDERLAKE_PCH_M
config SOC_INTEL_ALDERLAKE_PCH_N
bool
select SOC_INTEL_ALDERLAKE
- select MICROCODE_BLOB_UNDISCLOSED
help
Choose this option if your mainboard has a PCH-N chipset.
diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc
index bc3fe20bfe..c36c7172d5 100644
--- a/src/soc/intel/alderlake/Makefile.inc
+++ b/src/soc/intel/alderlake/Makefile.inc
@@ -78,8 +78,9 @@ cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-97-05
# RPL-S/HX B0
cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-b7-01
# 06-b7-00, 06-b7-02, 06-b7-05 RPL-S/HX A0, C0 and H0 missing
+else ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y)
+cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-be-00
else
-ifneq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y)
# 06-9a-00, 06-9a-01 are ADL-P/ADL-M Engineering Samples
# Missing 06-9a-02 ADL-P K0
# ADL-P L0, ADL-P R0 and ADL-M R0
@@ -87,7 +88,6 @@ cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9a-04
# RPL-P/H J0, RPL-U Q0
cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-ba-02
endif
-endif
ifeq ($(CONFIG_STITCH_ME_BIN),y)