diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/common/block/cse/cse.c | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index 2cb3452a89..9b8db54efd 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -1228,17 +1228,13 @@ static void cse_set_state(struct device *dev) * performed by FSP NotifyPhase(Ready To Boot) API invocations. * * Operations are: - * 1. Send EOP to CSE if not done. - * 2. Perform global reset lock. - * 3. Put HECI1 to D0i3 and disable the HECI1 if the user selects + * 1. Perform global reset lock. + * 2. Put HECI1 to D0i3 and disable the HECI1 if the user selects * DISABLE_HECI1_AT_PRE_BOOT config or CSE HFSTS1 Operation Mode is * `Software Temporary Disable`. */ static void cse_final_ready_to_boot(void) { - if (CONFIG(SOC_INTEL_CSE_SET_EOP)) - cse_send_end_of_post(); - cse_control_global_reset_lock(); if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT) || cse_is_hfs1_com_soft_temp_disable()) { @@ -1265,6 +1261,14 @@ static void cse_final_end_of_firmware(void) */ static void cse_final(struct device *dev) { + /* SoC user decided to send EOP late */ + if (CONFIG(SOC_INTEL_CSE_SEND_EOP_LATE)) + return; + + /* 1. Send EOP to CSE if not done.*/ + if (CONFIG(SOC_INTEL_CSE_SET_EOP)) + cse_send_end_of_post(); + if (!CONFIG(USE_FSP_NOTIFY_PHASE_READY_TO_BOOT)) cse_final_ready_to_boot(); |