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-rw-r--r--src/soc/intel/alderlake/Kconfig2
-rw-r--r--src/soc/intel/alderlake/reset.c17
-rw-r--r--src/soc/intel/apollolake/Kconfig2
-rw-r--r--src/soc/intel/apollolake/reset.c14
-rw-r--r--src/soc/intel/cannonlake/Kconfig2
-rw-r--r--src/soc/intel/cannonlake/reset.c17
-rw-r--r--src/soc/intel/elkhartlake/Kconfig2
-rw-r--r--src/soc/intel/elkhartlake/reset.c17
-rw-r--r--src/soc/intel/icelake/Kconfig2
-rw-r--r--src/soc/intel/icelake/reset.c17
-rw-r--r--src/soc/intel/jasperlake/Kconfig2
-rw-r--r--src/soc/intel/jasperlake/reset.c17
-rw-r--r--src/soc/intel/skylake/Kconfig2
-rw-r--r--src/soc/intel/skylake/reset.c16
-rw-r--r--src/soc/intel/tigerlake/Kconfig2
-rw-r--r--src/soc/intel/tigerlake/reset.c17
16 files changed, 16 insertions, 132 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 1a3f0724ae..ade2fc1fc5 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -16,6 +16,7 @@ config CPU_SPECIFIC_OPTIONS
select CPU_SUPPORTS_PM_TIMER_EMULATION
select FSP_COMPRESS_FSP_S_LZ4
select FSP_M_XIP
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select INTEL_DESCRIPTOR_MODE_CAPABLE
@@ -49,6 +50,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
+ select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_CAR
diff --git a/src/soc/intel/alderlake/reset.c b/src/soc/intel/alderlake/reset.c
index 1f7ea3c180..bc5815ac7a 100644
--- a/src/soc/intel/alderlake/reset.c
+++ b/src/soc/intel/alderlake/reset.c
@@ -1,12 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cf9_reset.h>
-#include <console/console.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
-#include <fsp/util.h>
#include <soc/intel/common/reset.h>
-#include <soc/pci_devs.h>
void do_global_reset(void)
{
@@ -18,17 +15,3 @@ void do_global_reset(void)
pmc_global_reset_enable(1);
do_full_reset();
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
- printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 0c8eae2264..3917feaf79 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -38,6 +38,7 @@ config CPU_SPECIFIC_OPTIONS
# Misc options
select CACHE_MRC_SETTINGS
select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_5
select GENERIC_GPIO_LIB
select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SMI_HANDLER
@@ -91,6 +92,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_SPI
select SOC_INTEL_COMMON_BLOCK_CSE
select SOC_INTEL_COMMON_BLOCK_SMBUS
+ select SOC_INTEL_COMMON_FSP_RESET
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select UDELAY_TSC
select TSC_MONOTONIC_TIMER
diff --git a/src/soc/intel/apollolake/reset.c b/src/soc/intel/apollolake/reset.c
index 8641b63aaf..186a546388 100644
--- a/src/soc/intel/apollolake/reset.c
+++ b/src/soc/intel/apollolake/reset.c
@@ -3,7 +3,6 @@
#include <cf9_reset.h>
#include <console/console.h>
#include <delay.h>
-#include <fsp/util.h>
#include <intelblocks/pmclib.h>
#include <soc/heci.h>
#include <soc/intel/common/reset.h>
@@ -47,16 +46,3 @@ void cf9_reset_prepare(void)
}
printk(BIOS_SPEW, "CSE took %lu ms\n", stopwatch_duration_msecs(&sw));
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_5: /* Global Reset */
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 5149274f40..2b862e7e86 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -82,6 +82,7 @@ config CPU_SPECIFIC_OPTIONS
select CPU_SUPPORTS_PM_TIMER_EMULATION
select FSP_COMPRESS_FSP_S_LZMA
select FSP_M_XIP
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select HAVE_FSP_LOGO_SUPPORT
@@ -120,6 +121,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_NHLT
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
+ select SOC_INTEL_COMMON_FSP_RESET
select SSE2
select SUPPORT_CPU_UCODE_IN_CBFS
select TSC_MONOTONIC_TIMER
diff --git a/src/soc/intel/cannonlake/reset.c b/src/soc/intel/cannonlake/reset.c
index 1f7ea3c180..bc5815ac7a 100644
--- a/src/soc/intel/cannonlake/reset.c
+++ b/src/soc/intel/cannonlake/reset.c
@@ -1,12 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cf9_reset.h>
-#include <console/console.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
-#include <fsp/util.h>
#include <soc/intel/common/reset.h>
-#include <soc/pci_devs.h>
void do_global_reset(void)
{
@@ -18,17 +15,3 @@ void do_global_reset(void)
pmc_global_reset_enable(1);
do_full_reset();
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
- printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index 05077ad316..f833178075 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -16,6 +16,7 @@ config CPU_SPECIFIC_OPTIONS
select CPU_SUPPORTS_PM_TIMER_EMULATION
select FSP_COMPRESS_FSP_S_LZ4
select FSP_M_XIP
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select INTEL_DESCRIPTOR_MODE_CAPABLE
@@ -50,6 +51,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
+ select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_CAR
diff --git a/src/soc/intel/elkhartlake/reset.c b/src/soc/intel/elkhartlake/reset.c
index fe3d7690b5..bc5815ac7a 100644
--- a/src/soc/intel/elkhartlake/reset.c
+++ b/src/soc/intel/elkhartlake/reset.c
@@ -1,12 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cf9_reset.h>
-#include <console/console.h>
-#include <fsp/util.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
#include <soc/intel/common/reset.h>
-#include <soc/pci_devs.h>
void do_global_reset(void)
{
@@ -18,17 +15,3 @@ void do_global_reset(void)
pmc_global_reset_enable(1);
do_full_reset();
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
- printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 464a11bd7e..23b9ba296b 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -16,6 +16,7 @@ config CPU_SPECIFIC_OPTIONS
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select CPU_SUPPORTS_PM_TIMER_EMULATION
select FSP_M_XIP
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select HAVE_INTEL_FSP_REPO
@@ -51,6 +52,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
select SOC_INTEL_COMMON_BLOCK_THERMAL
+ select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_CAR
diff --git a/src/soc/intel/icelake/reset.c b/src/soc/intel/icelake/reset.c
index 1f7ea3c180..bc5815ac7a 100644
--- a/src/soc/intel/icelake/reset.c
+++ b/src/soc/intel/icelake/reset.c
@@ -1,12 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cf9_reset.h>
-#include <console/console.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
-#include <fsp/util.h>
#include <soc/intel/common/reset.h>
-#include <soc/pci_devs.h>
void do_global_reset(void)
{
@@ -18,17 +15,3 @@ void do_global_reset(void)
pmc_global_reset_enable(1);
do_full_reset();
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
- printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index 4ea08377e4..00153fa16d 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -17,6 +17,7 @@ config CPU_SPECIFIC_OPTIONS
select COS_MAPPED_TO_MSB
select FSP_COMPRESS_FSP_S_LZ4
select FSP_M_XIP
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select INTEL_DESCRIPTOR_MODE_CAPABLE
@@ -50,6 +51,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
+ select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_CAR
diff --git a/src/soc/intel/jasperlake/reset.c b/src/soc/intel/jasperlake/reset.c
index 1f7ea3c180..bc5815ac7a 100644
--- a/src/soc/intel/jasperlake/reset.c
+++ b/src/soc/intel/jasperlake/reset.c
@@ -1,12 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cf9_reset.h>
-#include <console/console.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
-#include <fsp/util.h>
#include <soc/intel/common/reset.h>
-#include <soc/pci_devs.h>
void do_global_reset(void)
{
@@ -18,17 +15,3 @@ void do_global_reset(void)
pmc_global_reset_enable(1);
do_full_reset();
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
- printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 2478113c35..20b302db14 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -26,6 +26,7 @@ config CPU_SPECIFIC_OPTIONS
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select CPU_SUPPORTS_PM_TIMER_EMULATION
select FSP_M_XIP
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select HAVE_FSP_LOGO_SUPPORT
@@ -63,6 +64,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_THERMAL
select SOC_INTEL_COMMON_BLOCK_UART
select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
+ select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_NHLT
select SOC_INTEL_COMMON_RESET
diff --git a/src/soc/intel/skylake/reset.c b/src/soc/intel/skylake/reset.c
index 1076ad2ffa..8bf9db5830 100644
--- a/src/soc/intel/skylake/reset.c
+++ b/src/soc/intel/skylake/reset.c
@@ -1,8 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cf9_reset.h>
-#include <console/console.h>
-#include <fsp/util.h>
#include <intelblocks/pmclib.h>
#include <soc/intel/common/reset.h>
#include <soc/me.h>
@@ -30,17 +28,3 @@ void do_global_reset(void)
do_force_global_reset();
}
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
- printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index 79595269a2..492d6fd488 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -17,6 +17,7 @@ config CPU_SPECIFIC_OPTIONS
select DRIVERS_USB_ACPI
select FSP_COMPRESS_FSP_S_LZ4
select FSP_M_XIP
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select INTEL_DESCRIPTOR_MODE_CAPABLE
@@ -53,6 +54,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_USB4
select SOC_INTEL_COMMON_BLOCK_USB4_PCIE
select SOC_INTEL_COMMON_BLOCK_USB4_XHCI
+ select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_CAR
diff --git a/src/soc/intel/tigerlake/reset.c b/src/soc/intel/tigerlake/reset.c
index 1f7ea3c180..bc5815ac7a 100644
--- a/src/soc/intel/tigerlake/reset.c
+++ b/src/soc/intel/tigerlake/reset.c
@@ -1,12 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cf9_reset.h>
-#include <console/console.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
-#include <fsp/util.h>
#include <soc/intel/common/reset.h>
-#include <soc/pci_devs.h>
void do_global_reset(void)
{
@@ -18,17 +15,3 @@ void do_global_reset(void)
pmc_global_reset_enable(1);
do_full_reset();
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
- printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-24 19:24:55 +0000