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-rw-r--r--src/include/device/pci_ids.h23
-rw-r--r--src/southbridge/intel/lynxpoint/azalia.c1
-rw-r--r--src/southbridge/intel/lynxpoint/lpc.c5
-rw-r--r--src/southbridge/intel/lynxpoint/me.c1
-rw-r--r--src/southbridge/intel/lynxpoint/sata.c12
-rw-r--r--src/southbridge/intel/lynxpoint/smbus.c1
-rw-r--r--src/southbridge/intel/lynxpoint/usb_ehci.c2
-rw-r--r--src/southbridge/intel/lynxpoint/usb_xhci.c1
8 files changed, 46 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index dbc17062fe..cc1ba20611 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -2835,6 +2835,11 @@
#define PCI_DID_INTEL_LPT_C224 0x8c54
#define PCI_DID_INTEL_LPT_C226 0x8c56
#define PCI_DID_INTEL_LPT_H81 0x8c5c
+#define PCI_DID_INTEL_LPT_MOBILE_SAMPLE_9 0x8cc1
+#define PCI_DID_INTEL_LPT_DESKTOP_SAMPLE_9 0x8cc2
+#define PCI_DID_INTEL_LPT_HM97 0x8cc3
+#define PCI_DID_INTEL_LPT_Z97 0x8cc4
+#define PCI_DID_INTEL_LPT_H97 0x8cc6
#define PCI_DID_INTEL_LPT_LP_SAMPLE 0x9c41
#define PCI_DID_INTEL_LPT_LP_PREMIUM 0x9c43
#define PCI_DID_INTEL_LPT_LP_MAINSTREAM 0x9c45
@@ -3475,6 +3480,18 @@
#define PCI_DID_INTEL_LPT_H_MOBILE_SATA_RAID_PREM 0x8c07
#define PCI_DID_INTEL_LPT_H_MOBILE_SATA_IDE_P45 0x8c09
#define PCI_DID_INTEL_LPT_H_MOBILE_SATA_RAID_2 0x8c0f
+#define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_IDE_9 0x8c80
+#define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_AHCI_9 0x8c82
+#define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_RAID_1_9 0x8c84
+#define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_RAID_PREM_9 0x8c86
+#define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_IDE_P45_9 0x8c88
+#define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_RAID_2_9 0x8c0e
+#define PCI_DID_INTEL_LPT_H_MOBILE_SATA_IDE_9 0x8c81
+#define PCI_DID_INTEL_LPT_H_MOBILE_SATA_AHCI_9 0x8c83
+#define PCI_DID_INTEL_LPT_H_MOBILE_SATA_RAID_1_9 0x8c85
+#define PCI_DID_INTEL_LPT_H_MOBILE_SATA_RAID_PREM_9 0x8c87
+#define PCI_DID_INTEL_LPT_H_MOBILE_SATA_IDE_P45_9 0x8c89
+#define PCI_DID_INTEL_LPT_H_MOBILE_SATA_RAID_2_9 0x8c8f
#define PCI_DID_INTEL_LPT_LP_SATA_AHCI 0x9c03
#define PCI_DID_INTEL_LPT_LP_SATA_RAID_1 0x9c05
#define PCI_DID_INTEL_LPT_LP_SATA_RAID_PREM 0x9c07
@@ -4114,6 +4131,7 @@
/* Intel SMBUS device Ids */
#define PCI_DID_INTEL_LPT_H_SMBUS 0x8c22
+#define PCI_DID_INTEL_LPT_H_SMBUS_9 0x8ca2
#define PCI_DID_INTEL_LPT_LP_SMBUS 0x9c22
#define PCI_DID_INTEL_WPT_LP_SMBUS 0x9ca2
#define PCI_DID_INTEL_APL_SMBUS 0x5ad4
@@ -4141,10 +4159,13 @@
/* Intel EHCI device IDs */
#define PCI_DID_INTEL_LPT_H_EHCI_1 0x8c26
#define PCI_DID_INTEL_LPT_H_EHCI_2 0x8c2d
+#define PCI_DID_INTEL_LPT_H_EHCI_1_9 0x8ca6
+#define PCI_DID_INTEL_LPT_H_EHCI_2_9 0x8cad
#define PCI_DID_INTEL_LPT_LP_EHCI 0x9c26
/* Intel XHCI device Ids */
#define PCI_DID_INTEL_LPT_H_XHCI 0x8c31
+#define PCI_DID_INTEL_LPT_H_XHCI_9 0x8cb1
#define PCI_DID_INTEL_LPT_LP_XHCI 0x9c31
#define PCI_DID_INTEL_APL_XHCI 0x5aa8
#define PCI_DID_INTEL_GLK_XHCI 0x31a8
@@ -4215,6 +4236,7 @@
/* Intel AUDIO device Ids */
#define PCI_DID_INTEL_LPT_H_AUDIO 0x8c20
+#define PCI_DID_INTEL_LPT_H_AUDIO_9 0x8ca0
#define PCI_DID_INTEL_LPT_LP_AUDIO 0x9c20
#define PCI_DID_INTEL_APL_AUDIO 0x5a98
#define PCI_DID_INTEL_GLK_AUDIO 0x3198
@@ -4262,6 +4284,7 @@
/* Intel HECI/ME device Ids */
#define PCI_DID_INTEL_LPT_H_MEI 0x8c3a
+#define PCI_DID_INTEL_LPT_H_MEI_9 0x8cba
#define PCI_DID_INTEL_LPT_LP_MEI 0x9c3a
#define PCI_DID_INTEL_APL_CSE0 0x5a9a
#define PCI_DID_INTEL_GLK_CSE0 0x319a
diff --git a/src/southbridge/intel/lynxpoint/azalia.c b/src/southbridge/intel/lynxpoint/azalia.c
index f41b3c2f04..34f0753df8 100644
--- a/src/southbridge/intel/lynxpoint/azalia.c
+++ b/src/southbridge/intel/lynxpoint/azalia.c
@@ -122,6 +122,7 @@ static struct device_operations azalia_ops = {
static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_LPT_H_AUDIO,
+ PCI_DID_INTEL_LPT_H_AUDIO_9,
PCI_DID_INTEL_LPT_LP_AUDIO,
0
};
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index b8e9d5f595..e44d9a8d17 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -834,6 +834,11 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_LPT_LP_PREMIUM,
PCI_DID_INTEL_LPT_LP_MAINSTREAM,
PCI_DID_INTEL_LPT_LP_VALUE,
+ PCI_DID_INTEL_LPT_MOBILE_SAMPLE_9,
+ PCI_DID_INTEL_LPT_DESKTOP_SAMPLE_9,
+ PCI_DID_INTEL_LPT_HM97,
+ PCI_DID_INTEL_LPT_Z97,
+ PCI_DID_INTEL_LPT_H97,
0
};
diff --git a/src/southbridge/intel/lynxpoint/me.c b/src/southbridge/intel/lynxpoint/me.c
index 66d56dc8d2..d076f0ff87 100644
--- a/src/southbridge/intel/lynxpoint/me.c
+++ b/src/southbridge/intel/lynxpoint/me.c
@@ -923,6 +923,7 @@ static struct device_operations device_ops = {
static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_LPT_H_MEI,
+ PCI_DID_INTEL_LPT_H_MEI_9,
PCI_DID_INTEL_LPT_LP_MEI,
0
};
diff --git a/src/southbridge/intel/lynxpoint/sata.c b/src/southbridge/intel/lynxpoint/sata.c
index 49108ee439..b6cbb133da 100644
--- a/src/southbridge/intel/lynxpoint/sata.c
+++ b/src/southbridge/intel/lynxpoint/sata.c
@@ -231,6 +231,18 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_LPT_H_MOBILE_SATA_RAID_PREM,
PCI_DID_INTEL_LPT_H_MOBILE_SATA_IDE_P45,
PCI_DID_INTEL_LPT_H_MOBILE_SATA_RAID_2,
+ PCI_DID_INTEL_LPT_H_DESKTOP_SATA_IDE_9,
+ PCI_DID_INTEL_LPT_H_DESKTOP_SATA_AHCI_9,
+ PCI_DID_INTEL_LPT_H_DESKTOP_SATA_RAID_1_9,
+ PCI_DID_INTEL_LPT_H_DESKTOP_SATA_RAID_PREM_9,
+ PCI_DID_INTEL_LPT_H_DESKTOP_SATA_IDE_P45_9,
+ PCI_DID_INTEL_LPT_H_DESKTOP_SATA_RAID_2_9,
+ PCI_DID_INTEL_LPT_H_MOBILE_SATA_IDE_9,
+ PCI_DID_INTEL_LPT_H_MOBILE_SATA_AHCI_9,
+ PCI_DID_INTEL_LPT_H_MOBILE_SATA_RAID_1_9,
+ PCI_DID_INTEL_LPT_H_MOBILE_SATA_RAID_PREM_9,
+ PCI_DID_INTEL_LPT_H_MOBILE_SATA_IDE_P45_9,
+ PCI_DID_INTEL_LPT_H_MOBILE_SATA_RAID_2_9,
PCI_DID_INTEL_LPT_LP_SATA_AHCI,
PCI_DID_INTEL_LPT_LP_SATA_RAID_1,
PCI_DID_INTEL_LPT_LP_SATA_RAID_PREM,
diff --git a/src/southbridge/intel/lynxpoint/smbus.c b/src/southbridge/intel/lynxpoint/smbus.c
index 519afe5ca4..757254ef14 100644
--- a/src/southbridge/intel/lynxpoint/smbus.c
+++ b/src/southbridge/intel/lynxpoint/smbus.c
@@ -35,6 +35,7 @@ static struct device_operations smbus_ops = {
static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_LPT_H_SMBUS,
+ PCI_DID_INTEL_LPT_H_SMBUS_9,
PCI_DID_INTEL_LPT_LP_SMBUS,
PCI_DID_INTEL_WPT_LP_SMBUS,
0
diff --git a/src/southbridge/intel/lynxpoint/usb_ehci.c b/src/southbridge/intel/lynxpoint/usb_ehci.c
index 8853a143ca..662a4210b1 100644
--- a/src/southbridge/intel/lynxpoint/usb_ehci.c
+++ b/src/southbridge/intel/lynxpoint/usb_ehci.c
@@ -173,6 +173,8 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_LPT_LP_EHCI,
PCI_DID_INTEL_LPT_H_EHCI_1,
PCI_DID_INTEL_LPT_H_EHCI_2,
+ PCI_DID_INTEL_LPT_H_EHCI_1_9,
+ PCI_DID_INTEL_LPT_H_EHCI_2_9,
0
};
diff --git a/src/southbridge/intel/lynxpoint/usb_xhci.c b/src/southbridge/intel/lynxpoint/usb_xhci.c
index 1219bccf8c..2660be1667 100644
--- a/src/southbridge/intel/lynxpoint/usb_xhci.c
+++ b/src/southbridge/intel/lynxpoint/usb_xhci.c
@@ -343,6 +343,7 @@ static struct device_operations usb_xhci_ops = {
static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_LPT_H_XHCI,
+ PCI_DID_INTEL_LPT_H_XHCI_9,
PCI_DID_INTEL_LPT_LP_XHCI,
0
};