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-rw-r--r--src/cpu/amd/agesa/spi.c2
-rw-r--r--src/cpu/samsung/exynos5420/spi.c3
-rw-r--r--src/drivers/elog/elog.c2
-rw-r--r--src/drivers/intel/fsp/fastboot_cache.c2
-rw-r--r--src/drivers/spi/spi_flash.c5
-rw-r--r--src/ec/google/chromeec/ec_spi.c9
-rw-r--r--src/include/spi-generic.h5
-rw-r--r--src/include/spi_flash.h3
-rw-r--r--src/northbridge/intel/haswell/mrccache.c2
-rw-r--r--src/northbridge/intel/sandybridge/mrccache.c2
-rw-r--r--src/soc/intel/baytrail/nvm.c2
-rw-r--r--src/soc/intel/baytrail/spi.c3
-rw-r--r--src/soc/intel/fsp_baytrail/nvm.c2
-rw-r--r--src/soc/intel/fsp_baytrail/spi.c3
-rw-r--r--src/southbridge/amd/agesa/hudson/spi.c3
-rw-r--r--src/southbridge/amd/cimx/sb800/spi.c3
-rw-r--r--src/southbridge/intel/common/spi.c3
17 files changed, 19 insertions, 35 deletions
diff --git a/src/cpu/amd/agesa/spi.c b/src/cpu/amd/agesa/spi.c
index f4ffa6262f..5631053148 100644
--- a/src/cpu/amd/agesa/spi.c
+++ b/src/cpu/amd/agesa/spi.c
@@ -28,7 +28,7 @@ void spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len)
struct spi_flash *flash;
spi_init();
- flash = spi_flash_probe(0, 0, 0, 0);
+ flash = spi_flash_probe(0, 0);
if (!flash) {
printk(BIOS_DEBUG, "Could not find SPI device\n");
/* Dont make flow stop. */
diff --git a/src/cpu/samsung/exynos5420/spi.c b/src/cpu/samsung/exynos5420/spi.c
index 1c60378f3e..5c546cc14c 100644
--- a/src/cpu/samsung/exynos5420/spi.c
+++ b/src/cpu/samsung/exynos5420/spi.c
@@ -79,8 +79,7 @@ void spi_init(void)
printk(BIOS_INFO, "Exynos SPI driver initiated.\n");
}
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int mode)
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
{
ASSERT(bus >= 0 && bus < 3);
return &(exynos_spi_slaves[bus].slave);
diff --git a/src/drivers/elog/elog.c b/src/drivers/elog/elog.c
index 8816974cab..227bd82af6 100644
--- a/src/drivers/elog/elog.c
+++ b/src/drivers/elog/elog.c
@@ -548,7 +548,7 @@ int elog_init(void)
/* Prepare SPI */
spi_init();
- elog_spi = spi_flash_probe(0, 0, 0, 0);
+ elog_spi = spi_flash_probe(0, 0);
if (!elog_spi) {
printk(BIOS_ERR, "ELOG: Unable to find SPI flash\n");
return -1;
diff --git a/src/drivers/intel/fsp/fastboot_cache.c b/src/drivers/intel/fsp/fastboot_cache.c
index b9a6e33a60..64982d8dc1 100644
--- a/src/drivers/intel/fsp/fastboot_cache.c
+++ b/src/drivers/intel/fsp/fastboot_cache.c
@@ -185,7 +185,7 @@ void update_mrc_cache(void *unused)
/* 1. use spi_flash_probe() to find the flash, then... */
spi_init();
- struct spi_flash *flash = spi_flash_probe(0, 0, 1000000, SPI_MODE_3);
+ struct spi_flash *flash = spi_flash_probe(0, 0);
if (!flash) {
printk(BIOS_DEBUG, "Could not find SPI device\n");
return;
diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c
index 6d92836c13..9b676ae61f 100644
--- a/src/drivers/spi/spi_flash.c
+++ b/src/drivers/spi/spi_flash.c
@@ -250,15 +250,14 @@ static struct {
};
#define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
-struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int spi_mode)
+struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs)
{
struct spi_slave *spi;
struct spi_flash *flash = NULL;
int ret, i, shift;
u8 idcode[IDCODE_LEN], *idp;
- spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
+ spi = spi_setup_slave(bus, cs);
if (!spi) {
printk(BIOS_WARNING, "SF: Failed to set up slave\n");
return NULL;
diff --git a/src/ec/google/chromeec/ec_spi.c b/src/ec/google/chromeec/ec_spi.c
index cc2c9baba6..012a4cace5 100644
--- a/src/ec/google/chromeec/ec_spi.c
+++ b/src/ec/google/chromeec/ec_spi.c
@@ -23,8 +23,6 @@
#include "ec.h"
#include "ec_commands.h"
-#define CROSEC_SPI_SPEED (500000)
-
static int crosec_spi_io(uint8_t *write_bytes, size_t write_size,
uint8_t *read_bytes, size_t read_size,
void *context)
@@ -48,12 +46,9 @@ static int crosec_spi_io(uint8_t *write_bytes, size_t write_size,
int google_chromeec_command(struct chromeec_command *cec_command)
{
static struct spi_slave *slave = NULL;
- if (!slave) {
+ if (!slave)
slave = spi_setup_slave(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS,
- CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP,
- CROSEC_SPI_SPEED,
- SPI_READ_FLAG | SPI_WRITE_FLAG);
- }
+ CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP);
return crosec_command_proto(cec_command, crosec_spi_io, slave);
}
diff --git a/src/include/spi-generic.h b/src/include/spi-generic.h
index 6cdb87a7e7..b7a14f9342 100644
--- a/src/include/spi-generic.h
+++ b/src/include/spi-generic.h
@@ -84,14 +84,11 @@ void spi_init(void);
*
* bus: Bus ID of the slave chip.
* cs: Chip select ID of the slave chip on the specified bus.
- * max_hz: Maximum SCK rate in Hz.
- * mode: Clock polarity, clock phase and other parameters.
*
* Returns: A spi_slave reference that can be used in subsequent SPI
* calls, or NULL if one or more of the parameters are not supported.
*/
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int mode);
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs);
/*-----------------------------------------------------------------------
* Claim the bus and prepare it for communication with a given slave.
diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h
index 8e514719a1..61c931e32c 100644
--- a/src/include/spi_flash.h
+++ b/src/include/spi_flash.h
@@ -64,8 +64,7 @@ struct spi_flash {
size_t len);
};
-struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int spi_mode);
+struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs);
static inline int spi_flash_read(struct spi_flash *flash, u32 offset,
size_t len, void *buf)
diff --git a/src/northbridge/intel/haswell/mrccache.c b/src/northbridge/intel/haswell/mrccache.c
index 88dbf7f0c4..f411db629d 100644
--- a/src/northbridge/intel/haswell/mrccache.c
+++ b/src/northbridge/intel/haswell/mrccache.c
@@ -192,7 +192,7 @@ static void update_mrc_cache(void *unused)
// 1. use spi_flash_probe() to find the flash, then
spi_init();
- struct spi_flash *flash = spi_flash_probe(0, 0, 1000000, SPI_MODE_3);
+ struct spi_flash *flash = spi_flash_probe(0, 0);
if (!flash) {
printk(BIOS_DEBUG, "Could not find SPI device\n");
return;
diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c
index 5d7c49ba88..915f9d3019 100644
--- a/src/northbridge/intel/sandybridge/mrccache.c
+++ b/src/northbridge/intel/sandybridge/mrccache.c
@@ -191,7 +191,7 @@ static void update_mrc_cache(void *unused)
// 1. use spi_flash_probe() to find the flash, then
spi_init();
- struct spi_flash *flash = spi_flash_probe(0, 0, 1000000, SPI_MODE_3);
+ struct spi_flash *flash = spi_flash_probe(0, 0);
if (!flash) {
printk(BIOS_DEBUG, "Could not find SPI device\n");
return;
diff --git a/src/soc/intel/baytrail/nvm.c b/src/soc/intel/baytrail/nvm.c
index 843bc5aa8b..0cc64f59f3 100644
--- a/src/soc/intel/baytrail/nvm.c
+++ b/src/soc/intel/baytrail/nvm.c
@@ -37,7 +37,7 @@ static int nvm_init(void)
return 0;
spi_init();
- flash = spi_flash_probe(0, 0, 1000000, SPI_MODE_3);
+ flash = spi_flash_probe(0, 0);
if (!flash) {
printk(BIOS_DEBUG, "Could not find SPI device\n");
return -1;
diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c
index 5ac42c2dd4..d75caca7af 100644
--- a/src/soc/intel/baytrail/spi.c
+++ b/src/soc/intel/baytrail/spi.c
@@ -272,8 +272,7 @@ int spi_cs_is_valid(unsigned int bus, unsigned int cs)
return 0;
}
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int mode)
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
{
ich_spi_slave *slave = malloc(sizeof(*slave));
diff --git a/src/soc/intel/fsp_baytrail/nvm.c b/src/soc/intel/fsp_baytrail/nvm.c
index dab87ae69f..02244636f8 100644
--- a/src/soc/intel/fsp_baytrail/nvm.c
+++ b/src/soc/intel/fsp_baytrail/nvm.c
@@ -38,7 +38,7 @@ static int nvm_init(void)
return 0;
spi_init();
- flash = spi_flash_probe(0, 0, 1000000, SPI_MODE_3);
+ flash = spi_flash_probe(0, 0);
if (!flash) {
printk(BIOS_DEBUG, "Could not find SPI device\n");
return -1;
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c
index ddec2e0987..5e8da95d3e 100644
--- a/src/soc/intel/fsp_baytrail/spi.c
+++ b/src/soc/intel/fsp_baytrail/spi.c
@@ -270,8 +270,7 @@ int spi_cs_is_valid(unsigned int bus, unsigned int cs)
return 0;
}
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int mode)
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
{
ich_spi_slave *slave = malloc(sizeof(*slave));
diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c
index 573dd3d0d0..c19d1a0ff8 100644
--- a/src/southbridge/amd/agesa/hudson/spi.c
+++ b/src/southbridge/amd/agesa/hudson/spi.c
@@ -172,8 +172,7 @@ void spi_cs_deactivate(struct spi_slave *slave)
{
}
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int mode)
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
{
struct spi_slave *slave = malloc(sizeof(*slave));
diff --git a/src/southbridge/amd/cimx/sb800/spi.c b/src/southbridge/amd/cimx/sb800/spi.c
index a1cdf5565a..d059f5eb00 100644
--- a/src/southbridge/amd/cimx/sb800/spi.c
+++ b/src/southbridge/amd/cimx/sb800/spi.c
@@ -164,8 +164,7 @@ void spi_cs_deactivate(struct spi_slave *slave)
{
}
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int mode)
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
{
struct spi_slave *slave = malloc(sizeof(*slave));
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c
index 51586ccddb..14d2f54d28 100644
--- a/src/southbridge/intel/common/spi.c
+++ b/src/southbridge/intel/common/spi.c
@@ -299,8 +299,7 @@ int spi_cs_is_valid(unsigned int bus, unsigned int cs)
return 0;
}
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int mode)
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
{
ich_spi_slave *slave = malloc(sizeof(*slave));
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-24 14:35:29 +0000