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-rw-r--r--src/cpu/qemu-x86/Kconfig5
-rw-r--r--src/mainboard/emulation/qemu-q35/romstage.c17
2 files changed, 22 insertions, 0 deletions
diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
index 221a7bae45..e1469d6f1e 100644
--- a/src/cpu/qemu-x86/Kconfig
+++ b/src/cpu/qemu-x86/Kconfig
@@ -31,6 +31,11 @@ config CPU_QEMU_X86_TSEG_SMM
endchoice
+config SMM_TSEG_SIZE
+ hex
+ depends on SMM_TSEG
+ default 0x100000
+
config MAX_CPUS
int
default 32 if SMM_TSEG
diff --git a/src/mainboard/emulation/qemu-q35/romstage.c b/src/mainboard/emulation/qemu-q35/romstage.c
index ff06640bf9..d4700d5fb6 100644
--- a/src/mainboard/emulation/qemu-q35/romstage.c
+++ b/src/mainboard/emulation/qemu-q35/romstage.c
@@ -7,6 +7,8 @@
#include "q35.h"
+#define TSEG_SZ_MASK (3 << 1)
+
void mainboard_romstage_entry(void)
{
i82801ix_early_init();
@@ -14,5 +16,20 @@ void mainboard_romstage_entry(void)
if (!CONFIG(BOOTBLOCK_CONSOLE))
mainboard_machine_check();
+ /* Configure requested TSEG size */
+ switch (CONFIG_SMM_TSEG_SIZE) {
+ case 1 * MiB:
+ pci_update_config8(HOST_BRIDGE, ESMRAMC, ~TSEG_SZ_MASK, 0 << 1);
+ break;
+ case 2 * MiB:
+ pci_update_config8(HOST_BRIDGE, ESMRAMC, ~TSEG_SZ_MASK, 1 << 1);
+ break;
+ case 8 * MiB:
+ pci_update_config8(HOST_BRIDGE, ESMRAMC, ~TSEG_SZ_MASK, 2 << 1);
+ break;
+ default:
+ printk(BIOS_WARNING, "%s: Unsupported TSEG size: 0x%x\n", __func__, CONFIG_SMM_TSEG_SIZE);
+ }
+
cbmem_recovery(0);
}