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-rw-r--r--src/soc/intel/apollolake/cpu.c8
-rw-r--r--src/soc/intel/skylake/cpu.c8
2 files changed, 8 insertions, 8 deletions
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index a071337f9f..f2b14d73f6 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -48,6 +48,10 @@ static const struct reg_script core_msr_script[] = {
void soc_core_init(struct device *cpu)
{
+ /* Configure Core PRMRR for SGX. */
+ if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE))
+ prmrr_core_configure();
+
/* Clear out pending MCEs */
/* TODO(adurbin): Some of these banks are core vs package
scope. For now every CPU clears every bank. */
@@ -66,10 +70,6 @@ void soc_core_init(struct device *cpu)
*/
enable_pm_timer_emulation();
- /* Configure Core PRMRR for SGX. */
- if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE))
- prmrr_core_configure();
-
/* Set Max Non-Turbo ratio if RAPL is disabled. */
if (CONFIG(APL_SKIP_SET_POWER_LIMITS)) {
cpu_set_p_state_to_max_non_turbo_ratio();
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 1647db4855..307c849550 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -97,6 +97,10 @@ static void configure_c_states(void)
/* All CPUs including BSP will run the following function. */
void soc_core_init(struct device *cpu)
{
+ /* Configure Core PRMRR for SGX. */
+ if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE))
+ prmrr_core_configure();
+
/* Clear out pending MCEs */
/* TODO(adurbin): This should only be done on a cold boot. Also, some
* of these banks are core vs package scope. For now every CPU clears
@@ -126,10 +130,6 @@ void soc_core_init(struct device *cpu)
/* Enable Turbo */
enable_turbo();
-
- /* Configure Core PRMRR for SGX. */
- if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE))
- prmrr_core_configure();
}
static void per_cpu_smm_trigger(void)