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-rw-r--r--src/mainboard/asrock/b85m_pro4/romstage.c2
-rw-r--r--src/mainboard/asrock/h81m-hds/romstage.c2
-rw-r--r--src/mainboard/google/beltino/romstage.c2
-rw-r--r--src/mainboard/google/slippy/variants/falco/romstage.c2
-rw-r--r--src/mainboard/google/slippy/variants/leon/romstage.c2
-rw-r--r--src/mainboard/google/slippy/variants/peppy/romstage.c2
-rw-r--r--src/mainboard/google/slippy/variants/wolf/romstage.c2
-rw-r--r--src/mainboard/intel/baskingridge/romstage.c2
-rw-r--r--src/mainboard/lenovo/t440p/romstage.c2
-rw-r--r--src/mainboard/supermicro/x10slm-f/romstage.c2
-rw-r--r--src/northbridge/intel/haswell/pei_data.h5
11 files changed, 3 insertions, 22 deletions
diff --git a/src/mainboard/asrock/b85m_pro4/romstage.c b/src/mainboard/asrock/b85m_pro4/romstage.c
index f9632ce34d..661942e249 100644
--- a/src/mainboard/asrock/b85m_pro4/romstage.c
+++ b/src/mainboard/asrock/b85m_pro4/romstage.c
@@ -34,8 +34,6 @@ void mainboard_romstage_entry(void)
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
- .wdbbar = 0x4000000,
- .wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
diff --git a/src/mainboard/asrock/h81m-hds/romstage.c b/src/mainboard/asrock/h81m-hds/romstage.c
index 092b417657..4e6c8dc867 100644
--- a/src/mainboard/asrock/h81m-hds/romstage.c
+++ b/src/mainboard/asrock/h81m-hds/romstage.c
@@ -34,8 +34,6 @@ void mainboard_romstage_entry(void)
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
- .wdbbar = 0x4000000,
- .wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
diff --git a/src/mainboard/google/beltino/romstage.c b/src/mainboard/google/beltino/romstage.c
index 373b488fe9..263ee32675 100644
--- a/src/mainboard/google/beltino/romstage.c
+++ b/src/mainboard/google/beltino/romstage.c
@@ -62,8 +62,6 @@ void mainboard_romstage_entry(void)
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
- .wdbbar = 0x4000000,
- .wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
diff --git a/src/mainboard/google/slippy/variants/falco/romstage.c b/src/mainboard/google/slippy/variants/falco/romstage.c
index 1eb48bfd96..14883cad40 100644
--- a/src/mainboard/google/slippy/variants/falco/romstage.c
+++ b/src/mainboard/google/slippy/variants/falco/romstage.c
@@ -101,8 +101,6 @@ void variant_romstage_entry(void)
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
- .wdbbar = 0x4000000,
- .wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
diff --git a/src/mainboard/google/slippy/variants/leon/romstage.c b/src/mainboard/google/slippy/variants/leon/romstage.c
index 397c0edebb..4cd81f46db 100644
--- a/src/mainboard/google/slippy/variants/leon/romstage.c
+++ b/src/mainboard/google/slippy/variants/leon/romstage.c
@@ -97,8 +97,6 @@ void variant_romstage_entry(void)
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
- .wdbbar = 0x4000000,
- .wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
diff --git a/src/mainboard/google/slippy/variants/peppy/romstage.c b/src/mainboard/google/slippy/variants/peppy/romstage.c
index d2a92a8789..660d7de3aa 100644
--- a/src/mainboard/google/slippy/variants/peppy/romstage.c
+++ b/src/mainboard/google/slippy/variants/peppy/romstage.c
@@ -114,8 +114,6 @@ void variant_romstage_entry(void)
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
- .wdbbar = 0x4000000,
- .wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
diff --git a/src/mainboard/google/slippy/variants/wolf/romstage.c b/src/mainboard/google/slippy/variants/wolf/romstage.c
index dcd9ac06fd..866ac16252 100644
--- a/src/mainboard/google/slippy/variants/wolf/romstage.c
+++ b/src/mainboard/google/slippy/variants/wolf/romstage.c
@@ -101,8 +101,6 @@ void variant_romstage_entry(void)
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
- .wdbbar = 0x4000000,
- .wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
diff --git a/src/mainboard/intel/baskingridge/romstage.c b/src/mainboard/intel/baskingridge/romstage.c
index b89d13593c..dbe5ed9a4d 100644
--- a/src/mainboard/intel/baskingridge/romstage.c
+++ b/src/mainboard/intel/baskingridge/romstage.c
@@ -59,8 +59,6 @@ void mainboard_romstage_entry(void)
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
- .wdbbar = 0x4000000,
- .wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
diff --git a/src/mainboard/lenovo/t440p/romstage.c b/src/mainboard/lenovo/t440p/romstage.c
index 240aae2392..54929b04e9 100644
--- a/src/mainboard/lenovo/t440p/romstage.c
+++ b/src/mainboard/lenovo/t440p/romstage.c
@@ -40,8 +40,6 @@ void mainboard_romstage_entry(void)
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
- .wdbbar = 0x4000000,
- .wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
diff --git a/src/mainboard/supermicro/x10slm-f/romstage.c b/src/mainboard/supermicro/x10slm-f/romstage.c
index 0c610dd7ac..e1eb7b1a61 100644
--- a/src/mainboard/supermicro/x10slm-f/romstage.c
+++ b/src/mainboard/supermicro/x10slm-f/romstage.c
@@ -33,8 +33,6 @@ void mainboard_romstage_entry(void)
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
- .wdbbar = 0x4000000,
- .wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
diff --git a/src/northbridge/intel/haswell/pei_data.h b/src/northbridge/intel/haswell/pei_data.h
index 6e537403b3..17b7c182fa 100644
--- a/src/northbridge/intel/haswell/pei_data.h
+++ b/src/northbridge/intel/haswell/pei_data.h
@@ -73,8 +73,9 @@ struct pei_data
uint32_t epbar;
uint32_t pciexbar;
uint16_t smbusbar;
- uint32_t wdbbar;
- uint32_t wdbsize;
+ /* Unused by HSW MRC, but changes to the memory layout of this struct break the ABI */
+ uint32_t _unused_wdbbar;
+ uint32_t _unused_wdbsize;
uint32_t hpet_address;
uint32_t rcba;
uint32_t pmbase;
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-27 10:21:30 +0000