diff options
Diffstat (limited to 'src')
44 files changed, 34 insertions, 89 deletions
diff --git a/src/acpi/dsdt_top.asl b/src/acpi/dsdt_top.asl index d2fcfa6264..735389d3bc 100644 --- a/src/acpi/dsdt_top.asl +++ b/src/acpi/dsdt_top.asl @@ -7,3 +7,6 @@ #include <vendorcode/google/chromeos/acpi/gnvs.asl> #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif + +/* Power state (AC = 1) */ +Name (PWRS, One) diff --git a/src/mainboard/acer/g43t-am3/acpi_tables.c b/src/mainboard/acer/g43t-am3/acpi_tables.c index 67e7b1a0b2..cd44ed207b 100644 --- a/src/mainboard/acer/g43t-am3/acpi_tables.c +++ b/src/mainboard/acer/g43t-am3/acpi_tables.c @@ -5,6 +5,5 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - gnvs->pwrs = 1; /* Power state (AC = 1) */ gnvs->osys = 2002; /* At least WINXP SP2 (HPET fix) */ } diff --git a/src/mainboard/asrock/g41c-gs/acpi_tables.c b/src/mainboard/asrock/g41c-gs/acpi_tables.c deleted file mode 100644 index 566cad75bb..0000000000 --- a/src/mainboard/asrock/g41c-gs/acpi_tables.c +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <acpi/acpi_gnvs.h> -#include <soc/nvs.h> - -void mainboard_fill_gnvs(struct global_nvs *gnvs) -{ - gnvs->pwrs = 1; /* Power state (AC = 1) */ -} diff --git a/src/mainboard/asus/p5qc/acpi_tables.c b/src/mainboard/asus/p5qc/acpi_tables.c index 1ac09572f1..cd44ed207b 100644 --- a/src/mainboard/asus/p5qc/acpi_tables.c +++ b/src/mainboard/asus/p5qc/acpi_tables.c @@ -5,6 +5,5 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - gnvs->pwrs = 1; /* Power state (AC = 1) */ gnvs->osys = 2002; /* At least WINXP SP2 (HPET fix) */ } diff --git a/src/mainboard/asus/p5ql-em/acpi_tables.c b/src/mainboard/asus/p5ql-em/acpi_tables.c index 1ac09572f1..cd44ed207b 100644 --- a/src/mainboard/asus/p5ql-em/acpi_tables.c +++ b/src/mainboard/asus/p5ql-em/acpi_tables.c @@ -5,6 +5,5 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - gnvs->pwrs = 1; /* Power state (AC = 1) */ gnvs->osys = 2002; /* At least WINXP SP2 (HPET fix) */ } diff --git a/src/mainboard/asus/p5qpl-am/acpi_tables.c b/src/mainboard/asus/p5qpl-am/acpi_tables.c deleted file mode 100644 index 566cad75bb..0000000000 --- a/src/mainboard/asus/p5qpl-am/acpi_tables.c +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <acpi/acpi_gnvs.h> -#include <soc/nvs.h> - -void mainboard_fill_gnvs(struct global_nvs *gnvs) -{ - gnvs->pwrs = 1; /* Power state (AC = 1) */ -} diff --git a/src/mainboard/foxconn/g41s-k/acpi_tables.c b/src/mainboard/foxconn/g41s-k/acpi_tables.c deleted file mode 100644 index 3bdb266fda..0000000000 --- a/src/mainboard/foxconn/g41s-k/acpi_tables.c +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <acpi/acpi_gnvs.h> -#include <soc/nvs.h> - -void mainboard_fill_gnvs(struct global_nvs *gnvs) -{ - gnvs->pwrs = 1; /* Power state (AC = 1) */ -} diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/acpi_tables.c b/src/mainboard/gigabyte/ga-g41m-es2l/acpi_tables.c index 1ac09572f1..cd44ed207b 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/acpi_tables.c +++ b/src/mainboard/gigabyte/ga-g41m-es2l/acpi_tables.c @@ -5,6 +5,5 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - gnvs->pwrs = 1; /* Power state (AC = 1) */ gnvs->osys = 2002; /* At least WINXP SP2 (HPET fix) */ } diff --git a/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl b/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl index 698686466f..465c77c97a 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl +++ b/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl @@ -16,10 +16,6 @@ Name(OSV, Ones) /* Assume nothing */ Name(PICM, One) /* Assume APIC */ - /* Variables used by EC */ - /* TODO: These may belong in global non-volatile storage */ - Name(PWRS, Zero) - /* AcpiGpe0Blk */ OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04) Field(GP0B, ByteAcc, NoLock, Preserve) { diff --git a/src/mainboard/intel/dg41wv/acpi_tables.c b/src/mainboard/intel/dg41wv/acpi_tables.c deleted file mode 100644 index 566cad75bb..0000000000 --- a/src/mainboard/intel/dg41wv/acpi_tables.c +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <acpi/acpi_gnvs.h> -#include <soc/nvs.h> - -void mainboard_fill_gnvs(struct global_nvs *gnvs) -{ - gnvs->pwrs = 1; /* Power state (AC = 1) */ -} diff --git a/src/mainboard/intel/dg43gt/acpi_tables.c b/src/mainboard/intel/dg43gt/acpi_tables.c index 1ac09572f1..cd44ed207b 100644 --- a/src/mainboard/intel/dg43gt/acpi_tables.c +++ b/src/mainboard/intel/dg43gt/acpi_tables.c @@ -5,6 +5,5 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - gnvs->pwrs = 1; /* Power state (AC = 1) */ gnvs->osys = 2002; /* At least WINXP SP2 (HPET fix) */ } diff --git a/src/mainboard/lenovo/g505s/acpi/mainboard.asl b/src/mainboard/lenovo/g505s/acpi/mainboard.asl index 698686466f..465c77c97a 100644 --- a/src/mainboard/lenovo/g505s/acpi/mainboard.asl +++ b/src/mainboard/lenovo/g505s/acpi/mainboard.asl @@ -16,10 +16,6 @@ Name(OSV, Ones) /* Assume nothing */ Name(PICM, One) /* Assume APIC */ - /* Variables used by EC */ - /* TODO: These may belong in global non-volatile storage */ - Name(PWRS, Zero) - /* AcpiGpe0Blk */ OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04) Field(GP0B, ByteAcc, NoLock, Preserve) { diff --git a/src/mainboard/lenovo/thinkcentre_a58/acpi_tables.c b/src/mainboard/lenovo/thinkcentre_a58/acpi_tables.c deleted file mode 100644 index 566cad75bb..0000000000 --- a/src/mainboard/lenovo/thinkcentre_a58/acpi_tables.c +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <acpi/acpi_gnvs.h> -#include <soc/nvs.h> - -void mainboard_fill_gnvs(struct global_nvs *gnvs) -{ - gnvs->pwrs = 1; /* Power state (AC = 1) */ -} diff --git a/src/soc/amd/picasso/acpi/globalnvs.asl b/src/soc/amd/picasso/acpi/globalnvs.asl index 31d375c5e4..3f02657d04 100644 --- a/src/soc/amd/picasso/acpi/globalnvs.asl +++ b/src/soc/amd/picasso/acpi/globalnvs.asl @@ -14,7 +14,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) /* Miscellaneous */ , 8, // 0x00 - Processor Count LIDS, 8, // 0x01 - LID State - PWRS, 8, // 0x02 - AC Power State + , 8, // 0x02 - AC Power State CBMC, 32, // 0x03 - 0x06 - coreboot Memory Console PM1I, 64, // 0x07 - 0x0e - System Wake Source - PM1 Index GPEI, 64, // 0x0f - 0x16 - GPE Wake Source diff --git a/src/soc/amd/picasso/include/soc/nvs.h b/src/soc/amd/picasso/include/soc/nvs.h index b8945ffe3a..2829f7d20d 100644 --- a/src/soc/amd/picasso/include/soc/nvs.h +++ b/src/soc/amd/picasso/include/soc/nvs.h @@ -16,7 +16,7 @@ struct __packed global_nvs { /* Miscellaneous */ uint8_t unused_was_pcnt; /* 0x00 - Processor Count */ uint8_t lids; /* 0x01 - LID State */ - uint8_t pwrs; /* 0x02 - AC Power State */ + uint8_t unused_was_pwrs; /* 0x02 - AC Power State */ uint32_t cbmc; /* 0x03 - 0x06 - coreboot Memory Console */ uint64_t pm1i; /* 0x07 - 0x0e - System Wake Source - PM1 Index */ uint64_t gpei; /* 0x0f - 0x16 - GPE Wake Source */ diff --git a/src/soc/amd/stoneyridge/acpi/globalnvs.asl b/src/soc/amd/stoneyridge/acpi/globalnvs.asl index ce3653c561..e60789ec84 100644 --- a/src/soc/amd/stoneyridge/acpi/globalnvs.asl +++ b/src/soc/amd/stoneyridge/acpi/globalnvs.asl @@ -11,7 +11,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) /* Miscellaneous */ , 8, // 0x00 - Processor Count LIDS, 8, // 0x01 - LID State - PWRS, 8, // 0x02 - AC Power State + , 8, // 0x02 - AC Power State CBMC, 32, // 0x03 - 0x06 - coreboot Memory Console PM1I, 64, // 0x07 - 0x0e - System Wake Source - PM1 Index GPEI, 64, // 0x0f - 0x16 - GPE Wake Source diff --git a/src/soc/amd/stoneyridge/include/soc/nvs.h b/src/soc/amd/stoneyridge/include/soc/nvs.h index 055d74bbd1..2b61c7713c 100644 --- a/src/soc/amd/stoneyridge/include/soc/nvs.h +++ b/src/soc/amd/stoneyridge/include/soc/nvs.h @@ -16,7 +16,7 @@ struct __packed global_nvs { /* Miscellaneous */ uint8_t unused_was_pcnt; /* 0x00 - Processor Count */ uint8_t lids; /* 0x01 - LID State */ - uint8_t pwrs; /* 0x02 - AC Power State */ + uint8_t unused_was_pwrs; /* 0x02 - AC Power State */ uint32_t cbmc; /* 0x03 - 0x06 - coreboot Memory Console */ uint64_t pm1i; /* 0x07 - 0x0e - System Wake Source - PM1 Index */ uint64_t gpei; /* 0x0f - 0x16 - GPE Wake Source */ diff --git a/src/soc/intel/apollolake/acpi/globalnvs.asl b/src/soc/intel/apollolake/acpi/globalnvs.asl index b79a446297..225e9db7ea 100644 --- a/src/soc/intel/apollolake/acpi/globalnvs.asl +++ b/src/soc/intel/apollolake/acpi/globalnvs.asl @@ -12,7 +12,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) , 8, // 0x00 - Processor Count PPCM, 8, // 0x01 - Max PPC State LIDS, 8, // 0x02 - LID State - PWRS, 8, // 0x03 - AC Power State + , 8, // 0x03 - AC Power State DPTE, 8, // 0x04 - Enable DPTF CBMC, 32, // 0x05 - 0x08 - coreboot Memory Console PM1I, 64, // 0x09 - 0x10 - System Wake Source - PM1 Index diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h index 1f2b8ad4f7..aa909a80a7 100644 --- a/src/soc/intel/apollolake/include/soc/nvs.h +++ b/src/soc/intel/apollolake/include/soc/nvs.h @@ -16,7 +16,7 @@ struct __packed global_nvs { uint8_t unused_was_pcnt; /* 0x00 - Processor Count */ uint8_t ppcm; /* 0x01 - Max PPC State */ uint8_t lids; /* 0x02 - LID State */ - uint8_t pwrs; /* 0x03 - AC Power State */ + uint8_t unused_was_pwrs; /* 0x03 - AC Power State */ uint8_t dpte; /* 0x04 - Enable DPTF */ uint32_t cbmc; /* 0x05 - 0x08 - coreboot Memory Console */ uint64_t pm1i; /* 0x09 - 0x10 - System Wake Source - PM1 Index */ diff --git a/src/soc/intel/baytrail/acpi/globalnvs.asl b/src/soc/intel/baytrail/acpi/globalnvs.asl index c73b7a7b3f..20b7ed4897 100644 --- a/src/soc/intel/baytrail/acpi/globalnvs.asl +++ b/src/soc/intel/baytrail/acpi/globalnvs.asl @@ -19,7 +19,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) PRM5, 8, /* 0x0a - Lock function parameter */ P80D, 32, /* 0x0b - Debug port (IO 0x80) value */ LIDS, 8, /* 0x0f - LID state (open = 1) */ - PWRS, 8, /* 0x10 - Power State (AC = 1) */ + , 8, /* 0x10 - Power State (AC = 1) */ , 8, /* 0x11 - Processor count */ TPMP, 8, /* 0x12 - TPM Present and Enabled */ TLVL, 8, /* 0x13 - Throttle Level */ diff --git a/src/soc/intel/baytrail/include/soc/nvs.h b/src/soc/intel/baytrail/include/soc/nvs.h index a068d1edd4..d6136de170 100644 --- a/src/soc/intel/baytrail/include/soc/nvs.h +++ b/src/soc/intel/baytrail/include/soc/nvs.h @@ -19,7 +19,7 @@ struct __packed global_nvs { u8 prm5; /* 0x0a - Lock function parameter */ u32 p80d; /* 0x0b - Debug port (IO 0x80) value */ u8 lids; /* 0x0f - LID state (open = 1) */ - u8 pwrs; /* 0x10 - Power state (AC = 1) */ + u8 unused_was_pwrs; /* 0x10 - Power state (AC = 1) */ u8 unused_was_pcnt; /* 0x11 - Processor Count */ u8 tpmp; /* 0x12 - TPM Present and Enabled */ u8 tlvl; /* 0x13 - Throttle Level */ diff --git a/src/soc/intel/braswell/acpi/globalnvs.asl b/src/soc/intel/braswell/acpi/globalnvs.asl index 9a436710aa..d13e4a4c88 100644 --- a/src/soc/intel/braswell/acpi/globalnvs.asl +++ b/src/soc/intel/braswell/acpi/globalnvs.asl @@ -19,7 +19,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) PRM5, 8, /* 0x0a - Lock function parameter */ P80D, 32, /* 0x0b - Debug port (IO 0x80) value */ LIDS, 8, /* 0x0f - LID state (open = 1) */ - PWRS, 8, /* 0x10 - Power State (AC = 1) */ + , 8, /* 0x10 - Power State (AC = 1) */ , 8, /* 0x11 - Processor count */ TPMP, 8, /* 0x12 - TPM Present and Enabled */ TLVL, 8, /* 0x13 - Throttle Level */ diff --git a/src/soc/intel/braswell/include/soc/nvs.h b/src/soc/intel/braswell/include/soc/nvs.h index 7d27c3f822..82ed4f5ad3 100644 --- a/src/soc/intel/braswell/include/soc/nvs.h +++ b/src/soc/intel/braswell/include/soc/nvs.h @@ -19,7 +19,7 @@ struct __packed global_nvs { u8 prm5; /* 0x0a - Lock function parameter */ u32 p80d; /* 0x0b - Debug port (IO 0x80) value */ u8 lids; /* 0x0f - LID state (open = 1) */ - u8 pwrs; /* 0x10 - Power state (AC = 1) */ + u8 unused_was_pwrs; /* 0x10 - Power state (AC = 1) */ u8 unused_was_pcnt; /* 0x11 - Processor Count */ u8 tpmp; /* 0x12 - TPM Present and Enabled */ u8 tlvl; /* 0x13 - Throttle Level */ diff --git a/src/soc/intel/broadwell/include/soc/nvs.h b/src/soc/intel/broadwell/include/soc/nvs.h index 70f26e8ef1..1f9ae04493 100644 --- a/src/soc/intel/broadwell/include/soc/nvs.h +++ b/src/soc/intel/broadwell/include/soc/nvs.h @@ -29,7 +29,7 @@ struct __packed global_nvs { u8 s3u0; /* 0x14 - Enable USB in S3 */ u8 s33g; /* 0x15 - Enable 3G in S3 */ u8 lids; /* 0x16 - LID State */ - u8 pwrs; /* 0x17 - AC Power State */ + u8 unused_was_pwrs; /* 0x17 - AC Power State */ u32 obsolete_cmem; /* 0x18 - 0x1b - CBMEM TOC */ u32 cbmc; /* 0x1c - 0x1f - coreboot Memory Console */ u64 pm1i; /* 0x20 - 0x27 - PM1 wake status bit */ diff --git a/src/soc/intel/broadwell/pch/acpi/globalnvs.asl b/src/soc/intel/broadwell/pch/acpi/globalnvs.asl index 8a6bf8787e..876ac89d57 100644 --- a/src/soc/intel/broadwell/pch/acpi/globalnvs.asl +++ b/src/soc/intel/broadwell/pch/acpi/globalnvs.asl @@ -29,7 +29,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) S3U0, 8, // 0x14 - Enable USB in S3 S33G, 8, // 0x15 - Enable 3G in S3 LIDS, 8, // 0x16 - LID State - PWRS, 8, // 0x17 - AC Power State + , 8, // 0x17 - AC Power State , 32, // 0x18 - 0x1b - CBMEM TOC CBMC, 32, // 0x1c - 0x1f - coreboot Memory Console PM1I, 64, // 0x20 - 0x27 - PM1 wake status bit diff --git a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl index d9ecfb3d84..1290fb0ec2 100644 --- a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl +++ b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl @@ -13,7 +13,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) PPCM, 8, // 0x04 - Max PPC State TLVL, 8, // 0x05 - Throttle Level Limit LIDS, 8, // 0x06 - LID State - PWRS, 8, // 0x07 - AC Power State + , 8, // 0x07 - AC Power State CBMC, 32, // 0x08 - 0x0b AC Power State PM1I, 64, // 0x0c - 0x13 PM1 wake status bit GPEI, 64, // 0x14 - 0x17 GPE wake status bit diff --git a/src/soc/intel/common/block/include/intelblocks/nvs.h b/src/soc/intel/common/block/include/intelblocks/nvs.h index cba60f6040..1bbd4c1660 100644 --- a/src/soc/intel/common/block/include/intelblocks/nvs.h +++ b/src/soc/intel/common/block/include/intelblocks/nvs.h @@ -13,7 +13,7 @@ struct __packed global_nvs { u8 ppcm; /* 0x04 - Max PPC State */ u8 tlvl; /* 0x05 - Throttle Level Limit */ u8 lids; /* 0x06 - LID State */ - u8 pwrs; /* 0x07 - AC Power State */ + u8 unused_was_pwrs; /* 0x07 - AC Power State */ u32 cbmc; /* 0x08 - 0xb coreboot Memory Console */ u64 pm1i; /* 0x0c - 0x13 PM1 wake status bit */ u64 gpei; /* 0x14 - 0x1b GPE wake status bit */ diff --git a/src/soc/intel/denverton_ns/acpi/globalnvs.asl b/src/soc/intel/denverton_ns/acpi/globalnvs.asl index 103397cb4d..5bf706df7d 100644 --- a/src/soc/intel/denverton_ns/acpi/globalnvs.asl +++ b/src/soc/intel/denverton_ns/acpi/globalnvs.asl @@ -19,7 +19,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) PRM5, 8, // 0x0a - Lock function parameter P80D, 32, // 0x0b - Debug port (IO 0x80) value LIDS, 8, // 0x0f - LID state (open = 1) - PWRS, 8, // 0x10 - Power State (AC = 1) + , 8, // 0x10 - Power State (AC = 1) , 8, // 0x11 - Processor count TPMP, 8, // 0x12 - TPM Present and Enabled TLVL, 8, // 0x13 - Throttle Level diff --git a/src/soc/intel/denverton_ns/include/soc/nvs.h b/src/soc/intel/denverton_ns/include/soc/nvs.h index 3dd747dbbd..21915576ca 100644 --- a/src/soc/intel/denverton_ns/include/soc/nvs.h +++ b/src/soc/intel/denverton_ns/include/soc/nvs.h @@ -17,7 +17,7 @@ struct __packed global_nvs { u8 prm5; /* 0x0a - Lock function parameter */ u32 p80d; /* 0x0b - Debug port (IO 0x80) value */ u8 lids; /* 0x0f - LID state (open = 1) */ - u8 pwrs; /* 0x10 - Power state (AC = 1) */ + u8 unused_was_pwrs; /* 0x10 - Power state (AC = 1) */ u8 unused_was_pcnt; /* 0x11 - Processor Count */ u8 tpmp; /* 0x12 - TPM Present and Enabled */ u8 tlvl; /* 0x13 - Throttle Level */ diff --git a/src/soc/intel/quark/include/soc/nvs.h b/src/soc/intel/quark/include/soc/nvs.h index 64378cce3d..9974d5b5e5 100644 --- a/src/soc/intel/quark/include/soc/nvs.h +++ b/src/soc/intel/quark/include/soc/nvs.h @@ -7,7 +7,7 @@ struct __packed global_nvs { uint32_t cbmc; /* 0x00 - 0x03 - coreboot Memory Console */ - uint8_t pwrs; /* 0x4 - Power state (AC = 1) */ + uint8_t unused_was_pwrs; /* 0x4 - Power state (AC = 1) */ /* Required for future unified acpi_save_wake_source. */ uint32_t pm1i; diff --git a/src/soc/intel/skylake/acpi/globalnvs.asl b/src/soc/intel/skylake/acpi/globalnvs.asl index 97a69d596d..1bb27ebd8a 100644 --- a/src/soc/intel/skylake/acpi/globalnvs.asl +++ b/src/soc/intel/skylake/acpi/globalnvs.asl @@ -29,7 +29,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) S3U0, 8, // 0x14 - Enable USB in S3 S33G, 8, // 0x15 - Enable 3G in S3 LIDS, 8, // 0x16 - LID State - PWRS, 8, // 0x17 - AC Power State + , 8, // 0x17 - AC Power State , 32, // 0x18 - 0x1b - CBMEM TOC CBMC, 32, // 0x1c - 0x1f - coreboot Memory Console PM1I, 64, // 0x20 - 0x27 - PM1 wake status bit diff --git a/src/soc/intel/skylake/include/soc/nvs.h b/src/soc/intel/skylake/include/soc/nvs.h index 21415189c5..e04364a527 100644 --- a/src/soc/intel/skylake/include/soc/nvs.h +++ b/src/soc/intel/skylake/include/soc/nvs.h @@ -29,7 +29,7 @@ struct __packed global_nvs { u8 s3u0; /* 0x14 - Enable USB in S3 */ u8 s33g; /* 0x15 - Enable 3G in S3 */ u8 lids; /* 0x16 - LID State */ - u8 pwrs; /* 0x17 - AC Power State */ + u8 unused_was_pwrs; /* 0x17 - AC Power State */ u32 obsolete_cmem; /* 0x18 - 0x1b - CBMEM TOC */ u32 cbmc; /* 0x1c - 0x1f - coreboot Memory Console */ u64 pm1i; /* 0x20 - 0x27 - PM1 wake status bit */ diff --git a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl index 20e32efa6f..0d798b8ca2 100644 --- a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl +++ b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl @@ -19,7 +19,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) PRM5, 8, // 0x0a - Lock function parameter P80D, 32, // 0x0b - Debug port (IO 0x80) value LIDS, 8, // 0x0f - LID state (open = 1) - PWRS, 8, // 0x10 - Power State (AC = 1) + , 8, // 0x10 - Power State (AC = 1) /* Thermal policy */ Offset (0x11), TLVL, 8, // 0x11 - Throttle Level Limit diff --git a/src/southbridge/intel/bd82x6x/include/soc/nvs.h b/src/southbridge/intel/bd82x6x/include/soc/nvs.h index 1c33b0cd73..95bf91bcb6 100644 --- a/src/southbridge/intel/bd82x6x/include/soc/nvs.h +++ b/src/southbridge/intel/bd82x6x/include/soc/nvs.h @@ -19,7 +19,7 @@ struct __packed global_nvs { u8 prm5; /* 0x0a - Lock function parameter */ u32 p80d; /* 0x0b - Debug port (IO 0x80) value */ u8 lids; /* 0x0f - LID state (open = 1) */ - u8 pwrs; /* 0x10 - Power state (AC = 1) */ + u8 unused_was_pwrs; /* 0x10 - Power state (AC = 1) */ /* Thermal policy */ u8 tlvl; /* 0x11 - Throttle Level Limit */ u8 flvl; /* 0x12 - Current FAN Level */ diff --git a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl index a3b15b68d7..a1706a725f 100644 --- a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl +++ b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl @@ -19,7 +19,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) PRM5, 8, // 0x0a - Lock function parameter P80D, 32, // 0x0b - Debug port (IO 0x80) value LIDS, 8, // 0x0f - LID state (open = 1) - PWRS, 8, // 0x10 - Power State (AC = 1) + , 8, // 0x10 - Power State (AC = 1) DBGS, 8, // 0x11 - Debug State LINX, 8, // 0x12 - Linux OS DCKN, 8, // 0x13 - PCIe docking state diff --git a/src/southbridge/intel/i82801gx/include/soc/nvs.h b/src/southbridge/intel/i82801gx/include/soc/nvs.h index 933921c3f4..93272dc018 100644 --- a/src/southbridge/intel/i82801gx/include/soc/nvs.h +++ b/src/southbridge/intel/i82801gx/include/soc/nvs.h @@ -19,7 +19,7 @@ struct __packed global_nvs { u8 prm5; /* 0x0a - Lock function parameter */ u32 p80d; /* 0x0b - Debug port (IO 0x80) value */ u8 lids; /* 0x0f - LID state (open = 1) */ - u8 pwrs; /* 0x10 - Power state (AC = 1) */ + u8 unused_was_pwrs; /* 0x10 - Power state (AC = 1) */ u8 dbgs; /* 0x11 - Debug state */ u8 linx; /* 0x12 - Linux OS */ u8 dckn; /* 0x13 - PCIe docking state */ diff --git a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl index f408a8c53a..55a368eecc 100644 --- a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl +++ b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl @@ -19,7 +19,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) PRM5, 8, // 0x0a - Lock function parameter P80D, 32, // 0x0b - Debug port (IO 0x80) value LIDS, 8, // 0x0f - LID state (open = 1) - PWRS, 8, // 0x10 - Power State (AC = 1) + , 8, // 0x10 - Power State (AC = 1) DBGS, 8, // 0x11 - Debug State LINX, 8, // 0x12 - Linux OS DCKN, 8, // 0x13 - PCIe docking state diff --git a/src/southbridge/intel/i82801ix/include/soc/nvs.h b/src/southbridge/intel/i82801ix/include/soc/nvs.h index 3c9aac90a2..5ae7f25772 100644 --- a/src/southbridge/intel/i82801ix/include/soc/nvs.h +++ b/src/southbridge/intel/i82801ix/include/soc/nvs.h @@ -19,7 +19,7 @@ struct __packed global_nvs { u8 prm5; /* 0x0a - Lock function parameter */ u32 p80d; /* 0x0b - Debug port (IO 0x80) value */ u8 lids; /* 0x0f - LID state (open = 1) */ - u8 pwrs; /* 0x10 - Power state (AC = 1) */ + u8 unused_was_pwrs; /* 0x10 - Power state (AC = 1) */ u8 dbgs; /* 0x11 - Debug state */ u8 linx; /* 0x12 - Linux OS */ u8 dckn; /* 0x13 - PCIe docking state */ diff --git a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl b/src/southbridge/intel/i82801jx/acpi/globalnvs.asl index 264b52a3b0..2b3e21b188 100644 --- a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl +++ b/src/southbridge/intel/i82801jx/acpi/globalnvs.asl @@ -19,7 +19,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) PRM5, 8, // 0x0a - Lock function parameter P80D, 32, // 0x0b - Debug port (IO 0x80) value LIDS, 8, // 0x0f - LID state (open = 1) - PWRS, 8, // 0x10 - Power State (AC = 1) + , 8, // 0x10 - Power State (AC = 1) DBGS, 8, // 0x11 - Debug State LINX, 8, // 0x12 - Linux OS DCKN, 8, // 0x13 - PCIe docking state diff --git a/src/southbridge/intel/i82801jx/include/soc/nvs.h b/src/southbridge/intel/i82801jx/include/soc/nvs.h index 54c4a2c7c4..96c55882e8 100644 --- a/src/southbridge/intel/i82801jx/include/soc/nvs.h +++ b/src/southbridge/intel/i82801jx/include/soc/nvs.h @@ -18,7 +18,7 @@ struct __packed global_nvs { u8 prm5; /* 0x0a - Lock function parameter */ u32 p80d; /* 0x0b - Debug port (IO 0x80) value */ u8 lids; /* 0x0f - LID state (open = 1) */ - u8 pwrs; /* 0x10 - Power state (AC = 1) */ + u8 unused_was_pwrs; /* 0x10 - Power state (AC = 1) */ u8 dbgs; /* 0x11 - Debug state */ u8 linx; /* 0x12 - Linux OS */ u8 dckn; /* 0x13 - PCIe docking state */ diff --git a/src/southbridge/intel/ibexpeak/acpi/globalnvs.asl b/src/southbridge/intel/ibexpeak/acpi/globalnvs.asl index 46c6f4f958..8525633e60 100644 --- a/src/southbridge/intel/ibexpeak/acpi/globalnvs.asl +++ b/src/southbridge/intel/ibexpeak/acpi/globalnvs.asl @@ -19,7 +19,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) PRM5, 8, // 0x0a - Lock function parameter P80D, 32, // 0x0b - Debug port (IO 0x80) value LIDS, 8, // 0x0f - LID state (open = 1) - PWRS, 8, // 0x10 - Power State (AC = 1) + , 8, // 0x10 - Power State (AC = 1) /* Thermal policy */ Offset (0x11), TLVL, 8, // 0x11 - Throttle Level Limit diff --git a/src/southbridge/intel/ibexpeak/include/soc/nvs.h b/src/southbridge/intel/ibexpeak/include/soc/nvs.h index 03897cd4b7..f552a02b09 100644 --- a/src/southbridge/intel/ibexpeak/include/soc/nvs.h +++ b/src/southbridge/intel/ibexpeak/include/soc/nvs.h @@ -20,7 +20,7 @@ struct __packed global_nvs { u8 prm5; /* 0x0a - Lock function parameter */ u32 p80d; /* 0x0b - Debug port (IO 0x80) value */ u8 lids; /* 0x0f - LID state (open = 1) */ - u8 pwrs; /* 0x10 - Power state (AC = 1) */ + u8 unused_was_pwrs; /* 0x10 - Power state (AC = 1) */ /* Thermal policy */ u8 tlvl; /* 0x11 - Throttle Level Limit */ u8 flvl; /* 0x12 - Current FAN Level */ diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl index 1b06beb7b6..d0c08a14be 100644 --- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl +++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl @@ -19,7 +19,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) PRM5, 8, // 0x0a - Lock function parameter P80D, 32, // 0x0b - Debug port (IO 0x80) value LIDS, 8, // 0x0f - LID state (open = 1) - PWRS, 8, // 0x10 - Power State (AC = 1) + , 8, // 0x10 - Power State (AC = 1) /* Thermal policy */ Offset (0x11), TLVL, 8, // 0x11 - Throttle Level Limit diff --git a/src/southbridge/intel/lynxpoint/include/soc/nvs.h b/src/southbridge/intel/lynxpoint/include/soc/nvs.h index 7db206e6e9..5bda60d95a 100644 --- a/src/southbridge/intel/lynxpoint/include/soc/nvs.h +++ b/src/southbridge/intel/lynxpoint/include/soc/nvs.h @@ -19,7 +19,7 @@ struct __packed global_nvs { u8 prm5; /* 0x0a - Lock function parameter */ u32 p80d; /* 0x0b - Debug port (IO 0x80) value */ u8 lids; /* 0x0f - LID state (open = 1) */ - u8 pwrs; /* 0x10 - Power state (AC = 1) */ + u8 unused_was_pwrs; /* 0x10 - Power state (AC = 1) */ /* Thermal policy */ u8 tlvl; /* 0x11 - Throttle Level Limit */ u8 flvl; /* 0x12 - Current FAN Level */ |