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-rw-r--r--src/cpu/intel/haswell/haswell.h1
-rw-r--r--src/cpu/intel/haswell/haswell_init.c8
2 files changed, 8 insertions, 1 deletions
diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h
index 87c4e0a5b9..cb602ceaa9 100644
--- a/src/cpu/intel/haswell/haswell.h
+++ b/src/cpu/intel/haswell/haswell.h
@@ -36,6 +36,7 @@
#define MSR_CORE_THREAD_COUNT 0x35
#define MSR_PLATFORM_INFO 0xce
#define PLATFORM_INFO_SET_TDP (1 << 29)
+#define TIMED_MWAIT_SUPPORTED (1 << (37 - 32))
#define MSR_PKG_CST_CONFIG_CONTROL 0xe2
#define MSR_PMG_IO_CAPTURE_BASE 0xe4
#define MSR_FEATURE_CONFIG 0x13c
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c
index 0e48876d10..9881bb880f 100644
--- a/src/cpu/intel/haswell/haswell_init.c
+++ b/src/cpu/intel/haswell/haswell_init.c
@@ -431,7 +431,9 @@ void set_power_limits(u8 power_limit_1_time)
static void configure_c_states(void)
{
- msr_t msr;
+ msr_t msr = rdmsr(MSR_PLATFORM_INFO);
+
+ const bool timed_mwait_capable = !!(msr.hi & TIMED_MWAIT_SUPPORTED);
msr = rdmsr(MSR_PKG_CST_CONFIG_CONTROL);
msr.lo |= (1 << 30); // Package c-state Undemotion Enable
@@ -441,6 +443,10 @@ static void configure_c_states(void)
msr.lo |= (1 << 26); // C1 Auto Demotion Enable
msr.lo |= (1 << 25); // C3 Auto Demotion Enable
msr.lo &= ~(1 << 10); // Disable IO MWAIT redirection
+
+ if (timed_mwait_capable)
+ msr.lo |= (1 << 31); // Timed MWAIT Enable
+
/* The deepest package c-state defaults to factory-configured value. */
wrmsr(MSR_PKG_CST_CONFIG_CONTROL, msr);