diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/fsp_broadwell_de/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/fsp_broadwell_de/include/soc/lpc.h | 10 |
2 files changed, 3 insertions, 8 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig index 012c1842c2..fc0c76394c 100644 --- a/src/soc/intel/fsp_broadwell_de/Kconfig +++ b/src/soc/intel/fsp_broadwell_de/Kconfig @@ -7,6 +7,7 @@ if SOC_INTEL_FSP_BROADWELL_DE config CPU_SPECIFIC_OPTIONS def_bool y + select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ARCH_BOOTBLOCK_X86_32 select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h b/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h index 0408f7f640..30cb5764f2 100644 --- a/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h +++ b/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h @@ -17,6 +17,8 @@ #ifndef _SOC_LPC_H_ #define _SOC_LPC_H_ +#include <arch/acpi.h> + /* LPC Interface Bridge PCI Configuration Registers */ #define REVID 0x08 #define PIRQ_RCR1 0x60 @@ -49,14 +51,6 @@ #define GBL_EN (1 << 5) #define TMROF_EN (1 << 0) #define PM1_CNT 0x04 -#define SLP_EN (1 << 13) -#define SLP_TYP_SHIFT 10 -#define SLP_TYP (7 << SLP_TYP_SHIFT) -#define SLP_TYP_S0 0 -#define SLP_TYP_S1 1 -#define SLP_TYP_S3 5 -#define SLP_TYP_S4 6 -#define SLP_TYP_S5 7 #define GBL_RLS (1 << 2) #define BM_RLD (1 << 1) #define SCI_EN (1 << 0) |