summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/skylake/chip.c2
-rw-r--r--src/soc/intel/skylake/chip.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index b6485f7d94..12942caddc 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -345,7 +345,7 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params)
params->SerialIrqConfigSirqMode = config->SerialIrqConfigSirqMode;
params->SerialIrqConfigStartFramePulse = config->SerialIrqConfigStartFramePulse;
- params->SkipMpInit = config->SkipMpInit;
+ params->SkipMpInit = config->FspSkipMpInit;
/*
* To disable Heci, the Psf needs to be left unlocked
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index afb9967d57..f18c9d3113 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -308,7 +308,7 @@ struct soc_intel_skylake_config {
* Values: 0: PchSfpw4Clk, 1: PchSfpw6Clk, 2; PchSfpw8Clk.
*/
u8 SerialIrqConfigStartFramePulse;
- u8 SkipMpInit;
+ u8 FspSkipMpInit;
/* VrConfig Settings for 5 domains
* 0 = System Agent, 1 = IA Core, 2 = Ring,
* 3 = GT unsliced, 4 = GT sliced