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-rw-r--r--src/northbridge/via/vx800/early_smbus.c2
-rw-r--r--src/northbridge/via/vx800/pci_rawops.h5
-rw-r--r--src/northbridge/via/vx800/uma_ram_setting.c2
3 files changed, 5 insertions, 4 deletions
diff --git a/src/northbridge/via/vx800/early_smbus.c b/src/northbridge/via/vx800/early_smbus.c
index fd03cfbd67..2c8d5bf47c 100644
--- a/src/northbridge/via/vx800/early_smbus.c
+++ b/src/northbridge/via/vx800/early_smbus.c
@@ -128,7 +128,7 @@ static unsigned int get_spd_data(unsigned int dimm, unsigned int offset)
void enable_smbus(void)
{
- device_t dev;
+ pci_devfn_t dev;
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VX855_LPC), 0);
diff --git a/src/northbridge/via/vx800/pci_rawops.h b/src/northbridge/via/vx800/pci_rawops.h
index aa465d9629..14a0f1fda4 100644
--- a/src/northbridge/via/vx800/pci_rawops.h
+++ b/src/northbridge/via/vx800/pci_rawops.h
@@ -31,7 +31,8 @@ struct VIA_PCI_REG_INIT_TABLE {
u8 Value;
};
-static void pci_modify_config8(device_t dev, unsigned where, u8 orval, u8 mask)
+static void pci_modify_config8(pci_devfn_t dev, unsigned where, u8 orval,
+ u8 mask)
{
u8 data = pci_read_config8(dev, where);
data &= (~mask);
@@ -43,7 +44,7 @@ static void via_pci_inittable(u8 chipversion,
const struct VIA_PCI_REG_INIT_TABLE *initdata)
{
u8 i = 0;
- device_t devbxdxfx;
+ pci_devfn_t devbxdxfx;
for (i = 0;; i++) {
if ((initdata[i].Mask == 0) && (initdata[i].Value == 0)
&& (initdata[i].Bus == 0)
diff --git a/src/northbridge/via/vx800/uma_ram_setting.c b/src/northbridge/via/vx800/uma_ram_setting.c
index 46c2782d1a..c9738dad11 100644
--- a/src/northbridge/via/vx800/uma_ram_setting.c
+++ b/src/northbridge/via/vx800/uma_ram_setting.c
@@ -65,7 +65,7 @@ void SetUMARam(void)
{
#if 1
u8 ramregs[] = { 0x43, 0x42, 0x41, 0x40 };
- device_t vga_dev = PCI_DEV(0, 1, 0), d0f0_dev = PCI_DEV(0, 0, 0);
+ pci_devfn_t vga_dev = PCI_DEV(0, 1, 0), d0f0_dev = PCI_DEV(0, 0, 0);
u8 ByteVal, temp;
const UMARAM *pUMARamTable;
u16 UmaSize;