summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/devicetree.cb10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
index a996a703b2..e59ccc1fa7 100644
--- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
@@ -41,7 +41,7 @@ chip soc/intel/cannonlake
register "SkipExtGfxScan" = "1"
device domain 0 on
- device pci 00.0 off end # Host Bridge
+ device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device
device pci 04.0 off end # SA Thermal device
device pci 12.0 off end # Thermal Subsystem
@@ -61,7 +61,7 @@ chip soc/intel/cannonlake
device pci 15.1 off end # I2C #1
device pci 15.2 off end # I2C #2
device pci 15.3 off end # I2C #3
- device pci 16.0 off end # Management Engine Interface 1
+ device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT Redirection
@@ -97,10 +97,10 @@ chip soc/intel/cannonlake
end # GSPI #0
device pci 1e.3 off end # GSPI #1
device pci 1f.0 on end # LPC/eSPI
- device pci 1f.1 off end # P2SB
- device pci 1f.2 off end # Power Management Controller
+ device pci 1f.1 on end # P2SB
+ device pci 1f.2 on end # Power Management Controller
device pci 1f.3 off end # Intel HDA
- device pci 1f.4 off end # SMBus
+ device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI
device pci 1f.6 off end # GbE
end