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-rw-r--r--src/soc/intel/jasperlake/finalize.c13
-rw-r--r--src/soc/intel/jasperlake/include/soc/pmc.h3
2 files changed, 16 insertions, 0 deletions
diff --git a/src/soc/intel/jasperlake/finalize.c b/src/soc/intel/jasperlake/finalize.c
index d879db94fc..8219f0c1d5 100644
--- a/src/soc/intel/jasperlake/finalize.c
+++ b/src/soc/intel/jasperlake/finalize.c
@@ -40,6 +40,8 @@ static void pch_handle_sideband(config_t *config)
static void pch_finalize(void)
{
+ uint32_t reg32;
+ uint8_t *pmcbase;
config_t *config;
/* TCO Lock down */
@@ -62,6 +64,17 @@ static void pch_finalize(void)
if (config->PmTimerDisabled)
pmc_disable_acpi_timer();
+ pmcbase = pmc_mmio_regs();
+ if (config->s0ix_enable) {
+ /*
+ * Enable USBSUSPGQDIS qualification to ensure USB2 PHY SUS is power gated
+ * before entering s0ix.
+ */
+ reg32 = read32(pmcbase + CPPMVRIC3);
+ reg32 &= ~USBSUSPGQDIS;
+ write32(pmcbase + CPPMVRIC3, reg32);
+ }
+
pch_handle_sideband(config);
pmc_clear_pmcon_sts();
diff --git a/src/soc/intel/jasperlake/include/soc/pmc.h b/src/soc/intel/jasperlake/include/soc/pmc.h
index 34172f8691..e65e884e64 100644
--- a/src/soc/intel/jasperlake/include/soc/pmc.h
+++ b/src/soc/intel/jasperlake/include/soc/pmc.h
@@ -122,6 +122,9 @@
#define CPPMVRIC 0x1B1C
#define XTALSDQDIS (1 << 22)
+#define CPPMVRIC3 0x1E4C
+#define USBSUSPGQDIS (1 << 15)
+
#define IRQ_REG ACTL
#define SCI_IRQ_ADJUST 0
#define ACTL 0x1BD8