diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/intel/amenia/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/Kconfig | 8 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/bootblock/bootblock.c | 2 |
3 files changed, 10 insertions, 1 deletions
diff --git a/src/mainboard/intel/amenia/Kconfig b/src/mainboard/intel/amenia/Kconfig index be98b86d00..b2c1a8ce19 100644 --- a/src/mainboard/intel/amenia/Kconfig +++ b/src/mainboard/intel/amenia/Kconfig @@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS select MAINBOARD_HAS_LPC_TPM select HAVE_ACPI_RESUME select MAINBOARD_HAS_CHROMEOS + select TPM_ON_FAST_SPI config CHROMEOS bool diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 7cd548b0a1..bdb8eeb75d 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -41,6 +41,14 @@ config CPU_SPECIFIC_OPTIONS select HAVE_HARD_RESET select SOC_INTEL_COMMON +config TPM_ON_FAST_SPI + bool + default n + select LPC_TPM + help + TPM part is conntected on Fast SPI interface, but the LPC MMIO + TPM transactions are decoded and serialized over the SPI interface. + config SOC_INTEL_COMMON_RESET bool default y diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c index 245645518a..abb713e708 100644 --- a/src/soc/intel/apollolake/bootblock/bootblock.c +++ b/src/soc/intel/apollolake/bootblock/bootblock.c @@ -102,7 +102,7 @@ void bootblock_soc_early_init(void) if (IS_ENABLED(CONFIG_SOC_UART_DEBUG)) soc_console_uart_init(); - if (IS_ENABLED(CONFIG_LPC_TPM)) + if (IS_ENABLED(CONFIG_TPM_ON_FAST_SPI)) tpm_enable(); if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_LPC)) |