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-rw-r--r--src/mainboard/google/volteer/variants/baseboard/devicetree.cb34
1 files changed, 34 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
index 43ba2551e2..7790230b39 100644
--- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -154,6 +154,40 @@ chip soc/intel/tigerlake
[PchSerialIoIndexUART2] = PchSerialIoDisabled,
}"
+ # Set the minimum assertion width
+ # PchPmSlpS3MinAssert:
+ # - 1: 60us
+ # - 2: 1ms
+ # - 3: 50ms
+ # - 4: 2s
+ register "PchPmSlpS3MinAssert" = "3" # 50ms
+ # PchPmSlpS4MinAssert:
+ # - 1 = 1s
+ # - 2 = 2s
+ # - 3 = 3s
+ # - 4 = 4s
+ register "PchPmSlpS4MinAssert" = "1" # 1s
+ # PchPmSlpSusMinAssert:
+ # - 1 = 0ms
+ # - 2 = 500ms
+ # - 3 = 1s
+ # - 4 = 4s
+ register "PchPmSlpSusMinAssert" = "3" # 1s
+ # PchPmSlpAMinAssert
+ # - 1 = 0ms
+ # - 2 = 4s
+ # - 3 = 98ms
+ # - 4 = 2s
+ register "PchPmSlpAMinAssert" = "3" # 98ms
+
+ # NOTE: Duration programmed in the below register should never be smaller than the
+ # stretch duration programmed in the following registers -
+ # - GEN_PMCON_A.SLP_S3_MIN_ASST_WDTH (PchPmSlpS3MinAssert)
+ # - GEN_PMCON_A.S4MAW (PchPmSlpS4MinAssert)
+ # - PM_CFG.SLP_A_MIN_ASST_WDTH (PchPmSlpAMinAssert)
+ # - PM_CFG.SLP_LAN_MIN_ASST_WDTH
+ register "PchPmPwrCycDur" = "1" # 1s
+
# HD Audio
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkHdaEnable" = "0"