2 files changed, 28 insertions, 0 deletions
diff --git a/src/mainboard/google/rush_ryu/Kconfig b/src/mainboard/google/rush_ryu/Kconfig
index ec6eadb86b..c6929af589 100644
--- a/src/mainboard/google/rush_ryu/Kconfig
+++ b/src/mainboard/google/rush_ryu/Kconfig
@@ -91,4 +91,12 @@ config EC_GOOGLE_CHROMEEC_I2C_BUS
 	hex
 	default 1
 
+config DRAM_DMA_START
+	hex
+	default 0xc0000000
+
+config DRAM_DMA_SIZE
+	hex
+	default 0x00200000
+
 endif # BOARD_GOOGLE_RUSH_RYU
diff --git a/src/mainboard/google/rush_ryu/mainboard.c b/src/mainboard/google/rush_ryu/mainboard.c
index 93ffca9adc..1e80b5b9b2 100644
--- a/src/mainboard/google/rush_ryu/mainboard.c
+++ b/src/mainboard/google/rush_ryu/mainboard.c
@@ -17,8 +17,10 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <arch/mmu.h>
 #include <device/device.h>
 #include <boot/coreboot_tables.h>
+#include <memrange.h>
 
 #include <soc/addressmap.h>
 #include <soc/clock.h>
@@ -63,3 +65,21 @@ struct chip_operations mainboard_ops = {
 	.name   = "rush_ryu",
 	.enable_dev = mainboard_enable,
 };
+
+void mainboard_add_memory_ranges(struct memranges *map)
+{
+	/* Create non-cacheable region for DMA operations. */
+	memranges_insert(map, CONFIG_DRAM_DMA_START, CONFIG_DRAM_DMA_SIZE,
+			MA_MEM  | MA_MEM_NC | MA_NS | MA_RW);
+}
+
+void lb_board(struct lb_header *header)
+{
+	struct lb_range *dma;
+
+	dma = (struct lb_range *)lb_new_record(header);
+	dma->tag = LB_TAB_DMA;
+	dma->size = sizeof(*dma);
+	dma->range_start = CONFIG_DRAM_DMA_START;
+	dma->range_size = CONFIG_DRAM_DMA_SIZE;
+}