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-rw-r--r--src/mainboard/google/rush/romstage.c4
-rw-r--r--src/mainboard/google/rush_ryu/romstage.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/google/rush/romstage.c b/src/mainboard/google/rush/romstage.c
index dae26efbce..b54058fd38 100644
--- a/src/mainboard/google/rush/romstage.c
+++ b/src/mainboard/google/rush/romstage.c
@@ -43,11 +43,11 @@ static void configure_clocks(void)
{
/* EC on SPI1 controller. */
clock_enable_clear_reset(0, CLK_H_SBC1, 0, 0, 0, 0);
- clock_configure_source(sbc1, CLK_M, 500);
+ clock_configure_source(sbc1, CLK_M, 3000);
/* TPM on I2C3 controller */
clock_enable_clear_reset(0, 0, CLK_U_I2C3, 0, 0, 0);
- clock_configure_i2c_scl_freq(i2c3, PLLP, 19);
+ clock_configure_i2c_scl_freq(i2c3, PLLP, 400);
}
void romstage_mainboard_init(void)
diff --git a/src/mainboard/google/rush_ryu/romstage.c b/src/mainboard/google/rush_ryu/romstage.c
index 3234252f0a..b2acb5d9aa 100644
--- a/src/mainboard/google/rush_ryu/romstage.c
+++ b/src/mainboard/google/rush_ryu/romstage.c
@@ -40,7 +40,7 @@ static void configure_clocks(void)
{
/* TPM on I2C3 */
clock_enable_clear_reset(0, 0, CLK_U_I2C3, 0, 0, 0);
- clock_configure_i2c_scl_freq(i2c3, PLLP, 19);
+ clock_configure_i2c_scl_freq(i2c3, PLLP, 400);
/* EC on I2C2 */
clock_enable_clear_reset(0, CLK_H_I2C2, 0, 0, 0, 0);