9 files changed, 60 insertions, 80 deletions

diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc
index e2c44eb479..6bb7196805 100644
--- a/src/arch/arm64/Makefile.inc
+++ b/src/arch/arm64/Makefile.inc
@@ -107,6 +107,7 @@ romstage-$(CONFIG_ARM64_USE_ARCH_TIMER) += arch_timer.c
 romstage-y += memset.S
 romstage-y += memcpy.S
 romstage-y += memmove.S
+romstage-y += romstage.c
 romstage-y += transition.c transition_asm.S
 
 rmodules_arm64-y += memset.S
diff --git a/src/arch/arm64/include/arch/stages.h b/src/arch/arm64/include/arch/stages.h
index 9a88ea7fbe..2d6d583fce 100644
--- a/src/arch/arm64/include/arch/stages.h
+++ b/src/arch/arm64/include/arch/stages.h
@@ -21,4 +21,11 @@
 
 void stage_entry(void);
 
+/* This function is the romstage platform entry point, and should contain all
+   chipset and mainboard setup until DRAM is initialized and accessible. */
+void platform_romstage_main(void);
+/* This is an optional hook to run further chipset or mainboard code after DRAM
+   and associated support frameworks (like CBMEM) have been initialized. */
+void platform_romstage_postram(void);
+
 #endif
diff --git a/src/arch/arm64/romstage.c b/src/arch/arm64/romstage.c
new file mode 100644
index 0000000000..8cdb16baef
--- /dev/null
+++ b/src/arch/arm64/romstage.c
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/exception.h>
+#include <arch/stages.h>
+#include <cbmem.h>
+#include <console/console.h>
+#include <program_loading.h>
+#include <timestamp.h>
+
+__weak void platform_romstage_main(void) { /* no-op, for bring-up */ }
+__weak void platform_romstage_postram(void) { /* no-op */ }
+
+void main(void)
+{
+	timestamp_add_now(TS_START_ROMSTAGE);
+
+	console_init();
+	exception_init();
+
+	platform_romstage_main();
+	cbmem_initialize_empty();
+	platform_romstage_postram();
+
+	run_ramstage();
+}
diff --git a/src/mainboard/cavium/cn8100_sff_evb/romstage.c b/src/mainboard/cavium/cn8100_sff_evb/romstage.c
index e8e5cd6f90..7bb53e3de3 100644
--- a/src/mainboard/cavium/cn8100_sff_evb/romstage.c
+++ b/src/mainboard/cavium/cn8100_sff_evb/romstage.c
@@ -14,34 +14,24 @@
  *
  */
 
-#include <arch/exception.h>
-#include <cbmem.h>
-#include <romstage_handoff.h>
+#include <arch/stages.h>
 #include <soc/sdram.h>
 #include <soc/timer.h>
 #include <soc/mmu.h>
 #include <stdlib.h>
-#include <console/console.h>
-#include <program_loading.h>
 #include <libbdk-hal/bdk-config.h>
 #include <string.h>
 
 extern const struct bdk_devicetree_key_value devtree[];
 
-void main(void)
+void platform_romstage_main(void)
 {
 	watchdog_poke(0);
 
-	console_init();
-	exception_init();
-
 	bdk_config_set_fdt(devtree);
 
 	sdram_init();
 	soc_mmu_init();
 
 	watchdog_poke(0);
-
-	cbmem_initialize_empty();
-	run_ramstage();
 }
diff --git a/src/mainboard/google/cheza/romstage.c b/src/mainboard/google/cheza/romstage.c
index c930016080..ad8506193d 100644
--- a/src/mainboard/google/cheza/romstage.c
+++ b/src/mainboard/google/cheza/romstage.c
@@ -13,17 +13,8 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/exception.h>
-#include <cbmem.h>
-#include <halt.h>
-#include <program_loading.h>
-#include <console/console.h>
-#include <timestamp.h>
+#include <arch/stages.h>
 
-void main(void)
+void platform_romstage_main(void)
 {
-	console_init();
-	exception_init();
-	cbmem_initialize_empty();
-	run_ramstage();
 }
diff --git a/src/mainboard/google/gru/romstage.c b/src/mainboard/google/gru/romstage.c
index 9f938f3eb2..edf440d00e 100644
--- a/src/mainboard/google/gru/romstage.c
+++ b/src/mainboard/google/gru/romstage.c
@@ -14,24 +14,14 @@
  *
  */
 
-#include <arch/cache.h>
-#include <arch/cpu.h>
-#include <arch/exception.h>
 #include <arch/mmu.h>
-#include <cbfs.h>
-#include <cbmem.h>
-#include <gpio.h>
-#include <console/console.h>
+#include <arch/stages.h>
 #include <delay.h>
-#include <program_loading.h>
-#include <romstage_handoff.h>
-#include <soc/addressmap.h>
 #include <soc/mmu_operations.h>
 #include <soc/tsadc.h>
 #include <soc/sdram.h>
 #include <symbols.h>
 #include <soc/usb.h>
-#include <stdlib.h>
 
 #include "board.h"
 #include "pwm_regulator.h"
@@ -70,11 +60,9 @@ static void prepare_usb(void)
 	reset_usb_otg1();
 }
 
-void main(void)
+void platform_romstage_main(void)
 {
-	console_init();
 	tsadc_init(TSHUT_POL_HIGH);
-	exception_init();
 
 	/* Init DVS to conservative values. */
 	init_dvs_outputs();
@@ -87,6 +75,4 @@ void main(void)
 	mmu_config_range((void *)0, (uintptr_t)sdram_size_mb() * MiB,
 			 CACHED_MEM);
 	mmu_config_range(_dma_coherent, _dma_coherent_size, UNCACHED_MEM);
-	cbmem_initialize_empty();
-	run_ramstage();
 }
diff --git a/src/mainboard/google/kukui/romstage.c b/src/mainboard/google/kukui/romstage.c
index 342a0ba3d2..9eeaa68e09 100644
--- a/src/mainboard/google/kukui/romstage.c
+++ b/src/mainboard/google/kukui/romstage.c
@@ -13,21 +13,10 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/exception.h>
-#include <console/console.h>
-#include <program_loading.h>
+#include <arch/stages.h>
 #include <soc/mmu_operations.h>
-#include <timestamp.h>
 
-void main(void)
+void platform_romstage_main(void)
 {
-	timestamp_add_now(TS_START_ROMSTAGE);
-
-	/* Init UART baudrate when PLL on. */
-	console_init();
-	exception_init();
-
 	mtk_mmu_after_dram();
-
-	run_ramstage();
 }
diff --git a/src/mainboard/google/oak/romstage.c b/src/mainboard/google/oak/romstage.c
index 9f5ce5f2df..754c40ce66 100644
--- a/src/mainboard/google/oak/romstage.c
+++ b/src/mainboard/google/oak/romstage.c
@@ -12,39 +12,21 @@
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
-#include <arch/cache.h>
-#include <arch/cpu.h>
-#include <arch/exception.h>
-#include <arch/io.h>
-#include <arch/mmu.h>
-#include <boardid.h>
-#include <cbfs.h>
-#include <cbmem.h>
-#include <console/console.h>
-#include <delay.h>
-#include <program_loading.h>
-#include <romstage_handoff.h>
-#include <symbols.h>
-#include <timer.h>
-#include <timestamp.h>
 
+#include <arch/stages.h>
+#include <boardid.h>
 #include <soc/emi.h>
 #include <soc/mmu_operations.h>
 #include <soc/mt6391.h>
 #include <soc/pll.h>
 #include <soc/rtc.h>
+#include <timer.h>
 
-void main(void)
+void platform_romstage_main(void)
 {
 	int stabilize_usec;
 	struct stopwatch sw;
 
-	timestamp_add_now(TS_START_ROMSTAGE);
-
-	/* init uart baudrate when pll on */
-	console_init();
-	exception_init();
-
 	rtc_boot();
 
 	/* Raise CPU voltage to allow higher frequency */
@@ -64,9 +46,4 @@ void main(void)
 		mt_pll_raise_ca53_freq(1700 * MHz);
 
 	mtk_mmu_after_dram();
-
-	/* should be called after memory init */
-	cbmem_initialize_empty();
-
-	run_ramstage();
 }
diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc
index bd0e54fc80..8fece7969c 100644
--- a/src/soc/mediatek/mt8183/Makefile.inc
+++ b/src/soc/mediatek/mt8183/Makefile.inc
@@ -20,7 +20,7 @@ verstage-y += ../common/timer.c
 verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
 verstage-y += ../common/wdt.c
 
-romstage-y += emi.c
+romstage-y += ../common/cbmem.c emi.c
 romstage-y += ../common/gpio.c gpio.c
 romstage-y += ../common/mmu_operations.c mmu_operations.c
 romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c