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-rw-r--r--src/soc/intel/common/block/sgx/sgx.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/sgx/sgx.c b/src/soc/intel/common/block/sgx/sgx.c
index 2d4cc53aa7..60714d9ce2 100644
--- a/src/soc/intel/common/block/sgx/sgx.c
+++ b/src/soc/intel/common/block/sgx/sgx.c
@@ -100,8 +100,8 @@ void prmrr_core_configure(void)
return;
}
- printk(BIOS_INFO, "SGX: prmrr_base = 0x%llx", prmrr_base.data64);
- printk(BIOS_INFO, "SGX: prmrr_mask = 0x%llx", prmrr_mask.data64);
+ printk(BIOS_INFO, "SGX: prmrr_base = 0x%llx\n", prmrr_base.data64);
+ printk(BIOS_INFO, "SGX: prmrr_mask = 0x%llx\n", prmrr_mask.data64);
/* Program core PRMRR MSRs.
* - Set cache writeback mem attrib in PRMRR base MSR