aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/cpu/x86/16bit/entry16.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc
index cf366e0af6..a87ce754fa 100644
--- a/src/cpu/x86/16bit/entry16.inc
+++ b/src/cpu/x86/16bit/entry16.inc
@@ -54,7 +54,7 @@ _start16bit:
* If we are hyperthreaded or we have multiple cores it is bad,
* for SMP startup. On Opterons it causes a 5 second delay.
* Invalidating the cache was pure paranoia in any event.
- * If you CPU needs it you can write a CPU dependent version of
+ * If your CPU needs it you can write a CPU dependent version of
* entry16.inc.
*/