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-rw-r--r--src/mainboard/amd/parmer/devicetree.cb4
-rw-r--r--src/mainboard/amd/thatcher/devicetree.cb4
-rw-r--r--src/northbridge/amd/agesa/family15tn/northbridge.c23
3 files changed, 2 insertions, 29 deletions
diff --git a/src/mainboard/amd/parmer/devicetree.cb b/src/mainboard/amd/parmer/devicetree.cb
index 4a59b519be..32f5484bfc 100644
--- a/src/mainboard/amd/parmer/devicetree.cb
+++ b/src/mainboard/amd/parmer/devicetree.cb
@@ -25,7 +25,6 @@ chip northbridge/amd/agesa/family15tn/root_complex
device pci_domain 0 on
subsystemid 0x1022 0x1410 inherit
chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
- device pci 18.0 on # northbridge
chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
device pci 0.0 on end # Root Complex
device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
@@ -38,7 +37,6 @@ chip northbridge/amd/agesa/family15tn/root_complex
device pci 7.0 on end # LAN
device pci 8.0 off end # NB/SB Link P2P bridge
end
- end
chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus
device pci 10.0 on end # XHCI HC0
device pci 10.1 on end # XHCI HC1
@@ -75,7 +73,7 @@ chip northbridge/amd/agesa/family15tn/root_complex
register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
register "gpp_configuration" = "4"
end #southbridge/amd/hudson
-# device pci 18.0 on end
+ device pci 18.0 on end
#device pci 18.0 on end
device pci 18.1 on end
device pci 18.2 on end
diff --git a/src/mainboard/amd/thatcher/devicetree.cb b/src/mainboard/amd/thatcher/devicetree.cb
index 2a91e1a5d5..561a5b2a4e 100644
--- a/src/mainboard/amd/thatcher/devicetree.cb
+++ b/src/mainboard/amd/thatcher/devicetree.cb
@@ -25,7 +25,6 @@ chip northbridge/amd/agesa/family15tn/root_complex
device pci_domain 0 on
subsystemid 0x1022 0x1410 inherit
chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
- device pci 18.0 on # northbridge
chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
device pci 0.0 on end # Root Complex
device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
@@ -38,7 +37,6 @@ chip northbridge/amd/agesa/family15tn/root_complex
device pci 7.0 on end # LAN
device pci 8.0 off end # NB/SB Link P2P bridge
end
- end
chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus
device pci 10.0 on end # XHCI HC0
device pci 10.1 on end # XHCI HC1
@@ -92,7 +90,7 @@ chip northbridge/amd/agesa/family15tn/root_complex
register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
register "gpp_configuration" = "4"
end #southbridge/amd/hudson
-# device pci 18.0 on end
+ device pci 18.0 on end
#device pci 18.0 on end
device pci 18.1 on end
device pci 18.2 on end
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 9318164a04..df632e3bf1 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -446,35 +446,12 @@ static void northbridge_init(struct device *dev)
{
}
-static unsigned scan_chains(device_t dev, unsigned max)
-{
- unsigned nodeid;
- struct bus *link;
- device_t io_hub = NULL;
- u32 next_unitid = 0x18;
- nodeid = amdfam15_nodeid(dev);
- if (nodeid == 0) {
- for (link = dev->link_list; link; link = link->next) {
- //if (link->link_num == sblink) { /* devicetree put IO Hub on link_lsit[sblink] */
- if (link->link_num == 0) { /* devicetree put IO Hub on link_lsit[0] */
- io_hub = link->children;
- if (!io_hub || !io_hub->enabled) {
- die("I can't find the IO Hub, or IO Hub not enabled, please check the device tree.\n");
- }
- /* Now that nothing is overlapping it is safe to scan the children. */
- max = pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7, 0);
- }
- }
- }
- return max;
-}
static struct device_operations northbridge_operations = {
.read_resources = read_resources,
.set_resources = set_resources,
.enable_resources = pci_dev_enable_resources,
.init = northbridge_init,
- .scan_bus = scan_chains,
.enable = 0,
.ops_pci = 0,
};