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-rw-r--r--src/cpu/via/car/cache_as_ram.inc2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/via/car/cache_as_ram.inc b/src/cpu/via/car/cache_as_ram.inc
index eaa4ac9973..4bbefef3cb 100644
--- a/src/cpu/via/car/cache_as_ram.inc
+++ b/src/cpu/via/car/cache_as_ram.inc
@@ -139,10 +139,12 @@ clear_fixed_var_mtrr_out:
xorl $0x5c5c5c5c,%eax
rep stosl
+#ifdef CARTEST
movl REAL_XIP_ROM_BASE, %esi
movl %esi, %edi
movl $(CONFIG_XIP_ROM_SIZE>>2), %ecx
rep lodsl
+#endif
/* The key point of this CAR code is C7 cache does not turn into
* "no fill" mode, which is not compatible with general CAR code.