aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/veyron_jerry/mainboard.c1
-rw-r--r--src/mainboard/google/veyron_jerry/romstage.c12
-rw-r--r--src/mainboard/google/veyron_mighty/mainboard.c1
-rw-r--r--src/mainboard/google/veyron_mighty/romstage.c12
-rw-r--r--src/mainboard/google/veyron_pinky/mainboard.c1
-rw-r--r--src/mainboard/google/veyron_pinky/romstage.c20
-rw-r--r--src/soc/rockchip/rk3288/Makefile.inc1
-rw-r--r--src/soc/rockchip/rk3288/rk808.c5
8 files changed, 50 insertions, 3 deletions
diff --git a/src/mainboard/google/veyron_jerry/mainboard.c b/src/mainboard/google/veyron_jerry/mainboard.c
index 1c7dc7f5ad..2aa3645e03 100644
--- a/src/mainboard/google/veyron_jerry/mainboard.c
+++ b/src/mainboard/google/veyron_jerry/mainboard.c
@@ -52,6 +52,7 @@ static void configure_sdmmc(void)
/* use sdmmc0 io, disable JTAG function */
writel(RK_CLRBITS(1 << 12), &rk3288_grf->soc_con0);
+ /* Note: these power rail definitions are copied in romstage.c */
rk808_configure_ldo(PMIC_BUS, 4, 3300); /* VCCIO_SD */
rk808_configure_ldo(PMIC_BUS, 5, 3300); /* VCC33_SD */
diff --git a/src/mainboard/google/veyron_jerry/romstage.c b/src/mainboard/google/veyron_jerry/romstage.c
index b050228b5f..995609afc3 100644
--- a/src/mainboard/google/veyron_jerry/romstage.c
+++ b/src/mainboard/google/veyron_jerry/romstage.c
@@ -31,6 +31,7 @@
#include <soc/clock.h>
#include <soc/pwm.h>
#include <soc/grf.h>
+#include <soc/rk808.h>
#include <soc/tsadc.h>
#include <stdlib.h>
#include <symbols.h>
@@ -38,7 +39,7 @@
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
-#include "timer.h"
+#include "board.h"
static void regulate_vdd_log(unsigned int mv)
{
@@ -76,6 +77,12 @@ static void configure_l2ctlr(void)
write_l2ctlr(l2ctlr);
}
+static void sdmmc_power_off(void)
+{
+ rk808_configure_ldo(PMIC_BUS, 4, 0); /* VCCIO_SD */
+ rk808_configure_ldo(PMIC_BUS, 5, 0); /* VCC33_SD */
+}
+
void main(void)
{
#if CONFIG_COLLECT_TIMESTAMPS
@@ -90,6 +97,9 @@ void main(void)
configure_l2ctlr();
tsadc_init();
+ /* Need to power cycle SD card to ensure it is properly reset. */
+ sdmmc_power_off();
+
/* vdd_log 1200mv is enough for ddr run 666Mhz */
regulate_vdd_log(1200);
#if CONFIG_COLLECT_TIMESTAMPS
diff --git a/src/mainboard/google/veyron_mighty/mainboard.c b/src/mainboard/google/veyron_mighty/mainboard.c
index 1c7dc7f5ad..2aa3645e03 100644
--- a/src/mainboard/google/veyron_mighty/mainboard.c
+++ b/src/mainboard/google/veyron_mighty/mainboard.c
@@ -52,6 +52,7 @@ static void configure_sdmmc(void)
/* use sdmmc0 io, disable JTAG function */
writel(RK_CLRBITS(1 << 12), &rk3288_grf->soc_con0);
+ /* Note: these power rail definitions are copied in romstage.c */
rk808_configure_ldo(PMIC_BUS, 4, 3300); /* VCCIO_SD */
rk808_configure_ldo(PMIC_BUS, 5, 3300); /* VCC33_SD */
diff --git a/src/mainboard/google/veyron_mighty/romstage.c b/src/mainboard/google/veyron_mighty/romstage.c
index b050228b5f..995609afc3 100644
--- a/src/mainboard/google/veyron_mighty/romstage.c
+++ b/src/mainboard/google/veyron_mighty/romstage.c
@@ -31,6 +31,7 @@
#include <soc/clock.h>
#include <soc/pwm.h>
#include <soc/grf.h>
+#include <soc/rk808.h>
#include <soc/tsadc.h>
#include <stdlib.h>
#include <symbols.h>
@@ -38,7 +39,7 @@
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
-#include "timer.h"
+#include "board.h"
static void regulate_vdd_log(unsigned int mv)
{
@@ -76,6 +77,12 @@ static void configure_l2ctlr(void)
write_l2ctlr(l2ctlr);
}
+static void sdmmc_power_off(void)
+{
+ rk808_configure_ldo(PMIC_BUS, 4, 0); /* VCCIO_SD */
+ rk808_configure_ldo(PMIC_BUS, 5, 0); /* VCC33_SD */
+}
+
void main(void)
{
#if CONFIG_COLLECT_TIMESTAMPS
@@ -90,6 +97,9 @@ void main(void)
configure_l2ctlr();
tsadc_init();
+ /* Need to power cycle SD card to ensure it is properly reset. */
+ sdmmc_power_off();
+
/* vdd_log 1200mv is enough for ddr run 666Mhz */
regulate_vdd_log(1200);
#if CONFIG_COLLECT_TIMESTAMPS
diff --git a/src/mainboard/google/veyron_pinky/mainboard.c b/src/mainboard/google/veyron_pinky/mainboard.c
index 4bf1e088b6..c959726fa1 100644
--- a/src/mainboard/google/veyron_pinky/mainboard.c
+++ b/src/mainboard/google/veyron_pinky/mainboard.c
@@ -62,6 +62,7 @@ static void configure_sdmmc(void)
/* use sdmmc0 io, disable JTAG function */
writel(RK_CLRBITS(1 << 12), &rk3288_grf->soc_con0);
+ /* Note: these power rail definitions are copied in romstage.c */
switch (board_id()) {
case 0:
rk808_configure_ldo(PMIC_BUS, 8, 3300); /* VCCIO_SD */
diff --git a/src/mainboard/google/veyron_pinky/romstage.c b/src/mainboard/google/veyron_pinky/romstage.c
index b050228b5f..da4165fa61 100644
--- a/src/mainboard/google/veyron_pinky/romstage.c
+++ b/src/mainboard/google/veyron_pinky/romstage.c
@@ -31,6 +31,7 @@
#include <soc/clock.h>
#include <soc/pwm.h>
#include <soc/grf.h>
+#include <soc/rk808.h>
#include <soc/tsadc.h>
#include <stdlib.h>
#include <symbols.h>
@@ -38,7 +39,7 @@
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
-#include "timer.h"
+#include "board.h"
static void regulate_vdd_log(unsigned int mv)
{
@@ -76,6 +77,20 @@ static void configure_l2ctlr(void)
write_l2ctlr(l2ctlr);
}
+static void sdmmc_power_off(void)
+{
+ switch (board_id()) {
+ case 0:
+ rk808_configure_ldo(PMIC_BUS, 8, 0); /* VCCIO_SD */
+ gpio_output(GPIO(7, C, 5), 0); /* SD_EN */
+ break;
+ default:
+ rk808_configure_ldo(PMIC_BUS, 4, 0); /* VCCIO_SD */
+ rk808_configure_ldo(PMIC_BUS, 5, 0); /* VCC33_SD */
+ break;
+ }
+}
+
void main(void)
{
#if CONFIG_COLLECT_TIMESTAMPS
@@ -90,6 +105,9 @@ void main(void)
configure_l2ctlr();
tsadc_init();
+ /* Need to power cycle SD card to ensure it is properly reset. */
+ sdmmc_power_off();
+
/* vdd_log 1200mv is enough for ddr run 666Mhz */
regulate_vdd_log(1200);
#if CONFIG_COLLECT_TIMESTAMPS
diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc
index 01ed81b5c9..680bdb5429 100644
--- a/src/soc/rockchip/rk3288/Makefile.inc
+++ b/src/soc/rockchip/rk3288/Makefile.inc
@@ -49,6 +49,7 @@ romstage-y += gpio.c
romstage-y += spi.c
romstage-y += media.c
romstage-y += sdram.c
+romstage-y += rk808.c
romstage-y += pwm.c
romstage-y += tsadc.c
diff --git a/src/soc/rockchip/rk3288/rk808.c b/src/soc/rockchip/rk3288/rk808.c
index fffef8907e..9713a9292f 100644
--- a/src/soc/rockchip/rk3288/rk808.c
+++ b/src/soc/rockchip/rk3288/rk808.c
@@ -53,6 +53,11 @@ void rk808_configure_ldo(uint8_t bus, int ldo, int millivolts)
{
uint8_t vsel;
+ if (!millivolts) {
+ rk808_clrsetbits(bus, LDO_EN, 1 << (ldo - 1), 0);
+ return;
+ }
+
switch (ldo) {
case 1:
case 2:
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-21 03:42:10 +0000