diff options
Diffstat (limited to 'src')
18 files changed, 89 insertions, 83 deletions
diff --git a/src/northbridge/amd/agesa/family10/northbridge.h b/src/northbridge/amd/agesa/family10/northbridge.h index 465e7abd27..d5f701c956 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.h +++ b/src/northbridge/amd/agesa/family10/northbridge.h @@ -17,10 +17,10 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef NORTHBRIDGE_AMD_AGESA_FAM10H_H -#define NORTHBRIDGE_AMD_AGESA_FAM10H_H +#ifndef NORTHBRIDGE_AMD_AGESA_FAM10_H +#define NORTHBRIDGE_AMD_AGESA_FAM10_H static struct device_operations pci_domain_ops; static struct device_operations cpu_bus_ops; -#endif /* NORTHBRIDGE_AMD_AGESA_FAM10H_H */ +#endif /* NORTHBRIDGE_AMD_AGESA_FAM10_H */ diff --git a/src/northbridge/amd/agesa/family12/northbridge.h b/src/northbridge/amd/agesa/family12/northbridge.h index 4edb5259f7..3545048f78 100644 --- a/src/northbridge/amd/agesa/family12/northbridge.h +++ b/src/northbridge/amd/agesa/family12/northbridge.h @@ -17,12 +17,12 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef NORTHBRIDGE_AMD_AGESA_FAM12H_H -#define NORTHBRIDGE_AMD_AGESA_FAM12H_H +#ifndef NORTHBRIDGE_AMD_AGESA_FAM12_H +#define NORTHBRIDGE_AMD_AGESA_FAM12_H static struct device_operations pci_domain_ops; static struct device_operations cpu_bus_ops; device_t get_node_pci(u32 nodeid, u32 fn); -#endif /* NORTHBRIDGE_AMD_AGESA_FAM12H_H */ +#endif /* NORTHBRIDGE_AMD_AGESA_FAM12_H */ diff --git a/src/northbridge/amd/agesa/family14/Kconfig b/src/northbridge/amd/agesa/family14/Kconfig index e0edebc10e..971f271f2f 100644 --- a/src/northbridge/amd/agesa/family14/Kconfig +++ b/src/northbridge/amd/agesa/family14/Kconfig @@ -32,10 +32,10 @@ config HW_MEM_HOLE_SIZE_AUTO_INC config MMCONF_BASE_ADDRESS hex - default 0xf8000000 + default 0xF8000000 config MMCONF_BUS_NUMBER int default 16 -endif +endif # NORTHBRIDGE_AMD_AGESA_FAMILY14 diff --git a/src/northbridge/amd/agesa/family14/dimmSpd.c b/src/northbridge/amd/agesa/family14/dimmSpd.c index 4a0cd2ad59..6ca2ce1f55 100644 --- a/src/northbridge/amd/agesa/family14/dimmSpd.c +++ b/src/northbridge/amd/agesa/family14/dimmSpd.c @@ -34,19 +34,21 @@ //#pragma optimize ("", off) /** - * Gets the SMBUS address for an SPD from the array in devicetree.cb + * Gets the SMBus address for an SPD from the array in devicetree.cb * then read the SPD into the supplied buffer. */ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info) { UINT8 spdAddress; + ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); - ROMSTAGE_CONST struct northbridge_amd_agesa_family14_config *config = NULL; + if (dev == NULL) + return AGESA_ERROR; - if ((dev == 0) || (dev->chip_info == 0)) + ROMSTAGE_CONST struct northbridge_amd_agesa_family14_config *config = dev->chip_info; + if (config == NULL) return AGESA_ERROR; - config = dev->chip_info; if (info->SocketId >= ARRAY_SIZE(config->spdAddrLookup)) return AGESA_ERROR; if (info->MemChannelId >= ARRAY_SIZE(config->spdAddrLookup[0])) diff --git a/src/northbridge/amd/agesa/family14/northbridge.h b/src/northbridge/amd/agesa/family14/northbridge.h index 474e74c08a..c5ee7b236a 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.h +++ b/src/northbridge/amd/agesa/family14/northbridge.h @@ -17,12 +17,12 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef NORTHBRIDGE_AMD_AGESA_FAM14H_H -#define NORTHBRIDGE_AMD_AGESA_FAM14H_H +#ifndef NORTHBRIDGE_AMD_AGESA_FAM14_H +#define NORTHBRIDGE_AMD_AGESA_FAM14_H static struct device_operations pci_domain_ops; static struct device_operations cpu_bus_ops; device_t get_node_pci(u32 nodeid, u32 fn); -#endif /* NORTHBRIDGE_AMD_AGESA_FAM14H_H */ +#endif /* NORTHBRIDGE_AMD_AGESA_FAM14_H */ diff --git a/src/northbridge/amd/agesa/family15/Kconfig b/src/northbridge/amd/agesa/family15/Kconfig index 17eef08116..916e025017 100644 --- a/src/northbridge/amd/agesa/family15/Kconfig +++ b/src/northbridge/amd/agesa/family15/Kconfig @@ -31,13 +31,17 @@ config HT3_SUPPORT config HW_MEM_HOLE_SIZEK hex default 0x100000 + config HW_MEM_HOLE_SIZE_AUTO_INC bool default n + config MMCONF_BASE_ADDRESS hex default 0xF8000000 + config MMCONF_BUS_NUMBER int default 64 -endif #NORTHBRIDGE_AMD_AGESA_FAMILY15 + +endif # NORTHBRIDGE_AMD_AGESA_FAMILY15 diff --git a/src/northbridge/amd/agesa/family15/dimmSpd.c b/src/northbridge/amd/agesa/family15/dimmSpd.c index 375a968dac..bf8e59ea5d 100644 --- a/src/northbridge/amd/agesa/family15/dimmSpd.c +++ b/src/northbridge/amd/agesa/family15/dimmSpd.c @@ -16,6 +16,7 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ + #include <device/pci_def.h> #include <device/device.h> #include <stdlib.h> @@ -39,13 +40,15 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info) { UINT8 spdAddress; + ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); - ROMSTAGE_CONST struct northbridge_amd_agesa_family15_config *config = NULL; + if (dev == NULL) + return AGESA_ERROR; - if ((dev == 0) || (dev->chip_info == 0)) + ROMSTAGE_CONST struct northbridge_amd_agesa_family15_config *config = dev->chip_info; + if (config == NULL) return AGESA_ERROR; - config = dev->chip_info; if (info->SocketId >= ARRAY_SIZE(config->spdAddrLookup)) return AGESA_ERROR; if (info->MemChannelId >= ARRAY_SIZE(config->spdAddrLookup[0])) diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index c46db7cc92..405e9b42a4 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -63,7 +63,6 @@ static device_t __f2_dev[MAX_NODE_NUMS]; static device_t __f4_dev[MAX_NODE_NUMS]; static unsigned fx_devs = 0; - static dram_base_mask_t get_dram_base_mask(u32 nodeid) { device_t dev; @@ -202,8 +201,8 @@ static void set_vga_enable_reg(u32 nodeid, u32 linkn) /** * @return - * @retval 2 resoure not exist, usable - * @retval 0 resource exist, not usable + * @retval 2 resoure does not exist, usable + * @retval 0 resource exists, not usable * @retval 1 resource exist, resource has been allocated before */ static int reg_useable(unsigned reg, device_t goal_dev, unsigned goal_nodeid, @@ -287,7 +286,6 @@ static struct resource *amdfam15_find_mempair(device_t dev, u32 nodeid, u32 link return resource; } - static void amdfam15_link_read_bases(device_t dev, u32 nodeid, u32 link) { struct resource *resource; @@ -317,7 +315,6 @@ static void amdfam15_link_read_bases(device_t dev, u32 nodeid, u32 link) resource->flags |= IORESOURCE_BRIDGE; } - /* Initialize the memory constraints on the current bus */ resource = amdfam15_find_mempair(dev, nodeid, link); if (resource) { @@ -331,7 +328,6 @@ static void amdfam15_link_read_bases(device_t dev, u32 nodeid, u32 link) } - static void nb_read_resources(device_t dev) { u32 nodeid; @@ -356,17 +352,14 @@ static void nb_read_resources(device_t dev) resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; #endif - } - static void set_resource(device_t dev, struct resource *resource, u32 nodeid) { resource_t rbase, rend; unsigned reg, link_num; char buf[50]; - /* Make certain the resource has actually been set */ if (!(resource->flags & IORESOURCE_ASSIGNED)) { return; @@ -399,7 +392,7 @@ static void set_resource(device_t dev, struct resource *resource, u32 nodeid) set_io_addr_reg(dev, nodeid, link_num, reg, rbase>>8, rend>>8); } else if (resource->flags & IORESOURCE_MEM) { - set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, node_nums) ;// [39:8] + set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, node_nums);// [39:8] } resource->flags |= IORESOURCE_STORED; snprintf(buf, sizeof (buf), " <node %x link %x>", @@ -416,7 +409,6 @@ static void create_vga_resource(device_t dev, unsigned nodeid) { struct bus *link; - /* find out which link the VGA card is connected, * we only deal with the 'first' vga card */ for (link = dev->link_list; link; link = link->next) { @@ -442,7 +434,6 @@ static void create_vga_resource(device_t dev, unsigned nodeid) set_vga_enable_reg(nodeid, sblink); } - static void nb_set_resources(device_t dev) { unsigned nodeid; @@ -526,7 +517,6 @@ static void domain_read_resources(device_t dev) { unsigned reg; - /* Find the already assigned resource pairs */ get_fx_devs(); for (reg = 0x80; reg <= 0xd8; reg+= 0x08) { @@ -560,7 +550,6 @@ static void domain_read_resources(device_t dev) #if !CONFIG_PCI_64BIT_PREF_MEM pci_domain_read_resources(dev); - #else struct bus *link; struct resource *resource; @@ -596,7 +585,6 @@ static void domain_enable_resources(device_t dev) printk(BIOS_DEBUG, " Fam15 - leaving %s.\n", __func__); } - #if CONFIG_HW_MEM_HOLE_SIZEK != 0 struct hw_mem_hole_info { unsigned hole_startk; @@ -677,6 +665,7 @@ static void setup_uma_memory(void) #endif } + static void domain_set_resources(device_t dev) { #if CONFIG_PCI_64BIT_PREF_MEM @@ -788,7 +777,6 @@ static void domain_set_resources(device_t dev) sizek = limitk - basek; - /* see if we need a hole from 0xa0000 to 0xbffff */ if ((basek < ((8*64)+(8*16))) && (sizek > ((8*64)+(16*16)))) { ram_resource(dev, (idx | i), basek, ((8*64)+(8*16)) - basek); @@ -845,7 +833,6 @@ static void domain_set_resources(device_t dev) } } - static struct device_operations pci_domain_ops = { .read_resources = domain_read_resources, .set_resources = domain_set_resources, @@ -855,7 +842,6 @@ static struct device_operations pci_domain_ops = { .ops_pci_bus = pci_bus_default_ops, }; - static void sysconf_init(device_t dev) // first node { sblink = (pci_read_config32(dev, 0x64)>>8) & 7; // don't forget sublink1 @@ -1096,7 +1082,6 @@ static struct device_operations cpu_bus_ops = { .scan_bus = cpu_bus_scan, }; - static void root_complex_enable_dev(struct device *dev) { static int done = 0; diff --git a/src/northbridge/amd/agesa/family15tn/Kconfig b/src/northbridge/amd/agesa/family15tn/Kconfig index 24fdb0ddd0..c94782cf7e 100644 --- a/src/northbridge/amd/agesa/family15tn/Kconfig +++ b/src/northbridge/amd/agesa/family15tn/Kconfig @@ -38,4 +38,4 @@ config MMCONF_BUS_NUMBER int default 64 -endif +endif # NORTHBRIDGE_AMD_AGESA_FAMILY15_TN diff --git a/src/northbridge/amd/agesa/family15tn/chip.h b/src/northbridge/amd/agesa/family15tn/chip.h index 41571db9be..dafbfae7f0 100644 --- a/src/northbridge/amd/agesa/family15tn/chip.h +++ b/src/northbridge/amd/agesa/family15tn/chip.h @@ -17,8 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef _AGESA_FAM15TN_CHIP_H_ -#define _AGESA_FAM15TN_CHIP_H_ +#ifndef _NB_AGESA_CHIP_H_ +#define _NB_AGESA_CHIP_H_ struct northbridge_amd_agesa_family15tn_config { diff --git a/src/northbridge/amd/agesa/family15tn/dimmSpd.c b/src/northbridge/amd/agesa/family15tn/dimmSpd.c index 4d5ab5f340..25f2a14caf 100644 --- a/src/northbridge/amd/agesa/family15tn/dimmSpd.c +++ b/src/northbridge/amd/agesa/family15tn/dimmSpd.c @@ -19,6 +19,7 @@ #include <device/pci_def.h> #include <device/device.h> +#include <stdlib.h> /* warning: Porting.h includes an open #pragma pack(1) */ #include "Porting.h" @@ -26,28 +27,33 @@ #include "amdlib.h" #include "chip.h" -#include "northbridge/amd/agesa/dimmSpd.h" - -#define DIMENSION(array)(sizeof (array)/ sizeof (array [0])) +#include <northbridge/amd/agesa/dimmSpd.h> +/** + * Gets the SMBus address for an SPD from the array in devicetree.cb + * then read the SPD into the supplied buffer. + */ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info) { - int spdAddress; + UINT8 spdAddress; + ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); - ROMSTAGE_CONST struct northbridge_amd_agesa_family15tn_config *config = dev->chip_info; + if (dev == NULL) + return AGESA_ERROR; - if ((dev == 0) || (config == 0)) + ROMSTAGE_CONST struct northbridge_amd_agesa_family15tn_config *config = dev->chip_info; + if (config == NULL) return AGESA_ERROR; - if (info->SocketId >= DIMENSION(config->spdAddrLookup )) + if (info->SocketId >= ARRAY_SIZE(config->spdAddrLookup)) return AGESA_ERROR; - if (info->MemChannelId >= DIMENSION(config->spdAddrLookup[0] )) + if (info->MemChannelId >= ARRAY_SIZE(config->spdAddrLookup[0])) return AGESA_ERROR; - if (info->DimmId >= DIMENSION(config->spdAddrLookup[0][0])) + if (info->DimmId >= ARRAY_SIZE(config->spdAddrLookup[0][0])) return AGESA_ERROR; spdAddress = config->spdAddrLookup - [info->SocketId] [info->MemChannelId] [info->DimmId]; + [info->SocketId][info->MemChannelId][info->DimmId]; if (spdAddress == 0) return AGESA_ERROR; diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index 474767e029..ce0826ac21 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -201,8 +201,8 @@ static void set_vga_enable_reg(u32 nodeid, u32 linkn) /** * @return - * @retval 2 resoure not exist, usable - * @retval 0 resource exist, not usable + * @retval 2 resoure does not exist, usable + * @retval 0 resource exists, not usable * @retval 1 resource exist, resource has been allocated before */ static int reg_useable(unsigned reg, device_t goal_dev, unsigned goal_nodeid, @@ -392,7 +392,7 @@ static void set_resource(device_t dev, struct resource *resource, u32 nodeid) set_io_addr_reg(dev, nodeid, link_num, reg, rbase>>8, rend>>8); } else if (resource->flags & IORESOURCE_MEM) { - set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, node_nums) ;// [39:8] + set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, node_nums);// [39:8] } resource->flags |= IORESOURCE_STORED; snprintf(buf, sizeof (buf), " <node %x link %x>", @@ -749,7 +749,7 @@ static void domain_set_resources(device_t dev) if (!(d.mask & 1)) continue; basek = ((resource_t)(d.base & 0x1fffff00)) << 9; // could overflow, we may lost 6 bit here - limitk = ((resource_t)(((d.mask & ~1) + 0x000FF) & 0x1fffff00)) << 9 ; + limitk = ((resource_t)(((d.mask & ~1) + 0x000FF) & 0x1fffff00)) << 9; sizek = limitk - basek; @@ -1078,16 +1078,16 @@ static void root_complex_enable_dev(struct device *dev) } struct chip_operations northbridge_amd_agesa_family15tn_root_complex_ops = { - CHIP_NAME("AMD FAM15 Root Complex") + CHIP_NAME("AMD FAM15tn Root Complex") .enable_dev = root_complex_enable_dev, }; -/******************************************************************** -* Change the vendor / device IDs to match the generic VBIOS header. -********************************************************************/ +/********************************************************************* + * Change the vendor / device IDs to match the generic VBIOS header. * + *********************************************************************/ u32 map_oprom_vendev(u32 vendev) { - u32 new_vendev=vendev; + u32 new_vendev = vendev; switch(vendev) { case 0x10029900: /* AMD Radeon HD 7660G (Trinity) */ @@ -1124,7 +1124,7 @@ u32 map_oprom_vendev(u32 vendev) case 0x100299A0: /* AMD Radeon HD 7520G (Trinity) */ case 0x100299A2: /* AMD Radeon HD 7420G (Trinity) */ case 0x100299A4: /* AMD Radeon HD 7400G (Trinity) */ - new_vendev=0x10029901; + new_vendev = 0x10029901; break; } diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.h b/src/northbridge/amd/agesa/family15tn/northbridge.h index 0d91d5af90..9c655e6f9e 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.h +++ b/src/northbridge/amd/agesa/family15tn/northbridge.h @@ -17,10 +17,10 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef NORTHBRIDGE_AMD_AGESA_FAM15H_H -#define NORTHBRIDGE_AMD_AGESA_FAM15H_H +#ifndef NORTHBRIDGE_AMD_AGESA_FAM15_H +#define NORTHBRIDGE_AMD_AGESA_FAM15_H static struct device_operations pci_domain_ops; static struct device_operations cpu_bus_ops; -#endif /* NORTHBRIDGE_AMD_AGESA_FAM15H_H */ +#endif /* NORTHBRIDGE_AMD_AGESA_FAM15_H */ diff --git a/src/northbridge/amd/agesa/family16kb/Kconfig b/src/northbridge/amd/agesa/family16kb/Kconfig index 466414c8a3..91b94c646c 100644 --- a/src/northbridge/amd/agesa/family16kb/Kconfig +++ b/src/northbridge/amd/agesa/family16kb/Kconfig @@ -46,4 +46,4 @@ config VGA_BIOS_ID The default VGA BIOS PCI vendor/device ID should be set to the result of the map_oprom_vendev() function in northbridge.c. -endif +endif # NORTHBRIDGE_AMD_AGESA_FAMILY16_KB diff --git a/src/northbridge/amd/agesa/family16kb/chip.h b/src/northbridge/amd/agesa/family16kb/chip.h index 82e56b4fc6..d2cb873932 100644 --- a/src/northbridge/amd/agesa/family16kb/chip.h +++ b/src/northbridge/amd/agesa/family16kb/chip.h @@ -17,8 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef _AGESA_FAM16KB_CHIP_H_ -#define _AGESA_FAM16KB_CHIP_H_ +#ifndef _NB_AGESA_CHIP_H_ +#define _NB_AGESA_CHIP_H_ struct northbridge_amd_agesa_family16kb_config { diff --git a/src/northbridge/amd/agesa/family16kb/dimmSpd.c b/src/northbridge/amd/agesa/family16kb/dimmSpd.c index 8991bdb69e..6ffdf5d985 100644 --- a/src/northbridge/amd/agesa/family16kb/dimmSpd.c +++ b/src/northbridge/amd/agesa/family16kb/dimmSpd.c @@ -19,6 +19,7 @@ #include <device/pci_def.h> #include <device/device.h> +#include <stdlib.h> /* warning: Porting.h includes an open #pragma pack(1) */ #include "Porting.h" @@ -26,28 +27,33 @@ #include "amdlib.h" #include "chip.h" -#include "northbridge/amd/agesa/dimmSpd.h" - -#define DIMENSION(array)(sizeof (array)/ sizeof (array [0])) +#include <northbridge/amd/agesa/dimmSpd.h> +/** + * Gets the SMBus address for an SPD from the array in devicetree.cb + * then read the SPD into the supplied buffer. + */ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info) { - int spdAddress; + UINT8 spdAddress; + ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); - ROMSTAGE_CONST struct northbridge_amd_agesa_family16kb_config *config = dev->chip_info; + if (dev == NULL) + return AGESA_ERROR; - if ((dev == 0) || (config == 0)) + ROMSTAGE_CONST struct northbridge_amd_agesa_family16kb_config *config = dev->chip_info; + if (config == NULL) return AGESA_ERROR; - if (info->SocketId >= DIMENSION(config->spdAddrLookup )) + if (info->SocketId >= ARRAY_SIZE(config->spdAddrLookup)) return AGESA_ERROR; - if (info->MemChannelId >= DIMENSION(config->spdAddrLookup[0] )) + if (info->MemChannelId >= ARRAY_SIZE(config->spdAddrLookup[0])) return AGESA_ERROR; - if (info->DimmId >= DIMENSION(config->spdAddrLookup[0][0])) + if (info->DimmId >= ARRAY_SIZE(config->spdAddrLookup[0][0])) return AGESA_ERROR; spdAddress = config->spdAddrLookup - [info->SocketId] [info->MemChannelId] [info->DimmId]; + [info->SocketId][info->MemChannelId][info->DimmId]; if (spdAddress == 0) return AGESA_ERROR; diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index 74a72f4d36..01eaa208f0 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -379,7 +379,7 @@ static void set_resource(device_t dev, struct resource *resource, u32 nodeid) set_io_addr_reg(dev, nodeid, link_num, reg, rbase>>8, rend>>8); } else if (resource->flags & IORESOURCE_MEM) { - set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, node_nums) ;// [39:8] + set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, node_nums);// [39:8] } resource->flags |= IORESOURCE_STORED; snprintf(buf, sizeof (buf), " <node %x link %x>", @@ -757,7 +757,7 @@ static void domain_set_resources(device_t dev) if (!(d.mask & 1)) continue; basek = ((resource_t)(d.base & 0x1fffff00)) << 9; // could overflow, we may lost 6 bit here - limitk = ((resource_t)(((d.mask & ~1) + 0x000FF) & 0x1fffff00)) << 9 ; + limitk = ((resource_t)(((d.mask & ~1) + 0x000FF) & 0x1fffff00)) << 9; sizek = limitk - basek; diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.h b/src/northbridge/amd/agesa/family16kb/northbridge.h index 0161ae676b..38501c865a 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.h +++ b/src/northbridge/amd/agesa/family16kb/northbridge.h @@ -14,13 +14,13 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef NORTHBRIDGE_AMD_AGESA_FAM16H_H -#define NORTHBRIDGE_AMD_AGESA_FAM16H_H +#ifndef NORTHBRIDGE_AMD_AGESA_FAM16_H +#define NORTHBRIDGE_AMD_AGESA_FAM16_H static struct device_operations pci_domain_ops; static struct device_operations cpu_bus_ops; -#endif /* NORTHBRIDGE_AMD_AGESA_FAM16H_H */ +#endif /* NORTHBRIDGE_AMD_AGESA_FAM16_H */ |