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-rw-r--r--src/southbridge/intel/ibexpeak/smi.c4
-rw-r--r--src/southbridge/intel/ibexpeak/smihandler.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/ibexpeak/smi.c b/src/southbridge/intel/ibexpeak/smi.c
index 950dbe0e2a..961f3d5598 100644
--- a/src/southbridge/intel/ibexpeak/smi.c
+++ b/src/southbridge/intel/ibexpeak/smi.c
@@ -181,9 +181,9 @@ static u32 reset_tco_status(void)
reg32 = inl(tcobase + 0x04);
/* set status bits are cleared by writing 1 to them */
- outl(reg32 & ~(1<<18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS
+ outl(reg32 & ~(1 << 18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS
if (reg32 & (1 << 18))
- outl(reg32 & (1<<18), tcobase + 0x04); // clear BOOT_STS
+ outl(reg32 & (1 << 18), tcobase + 0x04); // clear BOOT_STS
return reg32;
}
diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c
index a0b963ea3d..af25c49ceb 100644
--- a/src/southbridge/intel/ibexpeak/smihandler.c
+++ b/src/southbridge/intel/ibexpeak/smihandler.c
@@ -215,9 +215,9 @@ static u32 reset_tco_status(void)
reg32 = inl(tcobase + 0x04);
/* set status bits are cleared by writing 1 to them */
- outl(reg32 & ~(1<<18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS
+ outl(reg32 & ~(1 << 18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS
if (reg32 & (1 << 18))
- outl(reg32 & (1<<18), tcobase + 0x04); // clear BOOT_STS
+ outl(reg32 & (1 << 18), tcobase + 0x04); // clear BOOT_STS
return reg32;
}