diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/butterfly/romstage.c | 4 | ||||
| -rw-r--r-- | src/mainboard/google/link/romstage.c | 4 | ||||
| -rw-r--r-- | src/mainboard/google/parrot/romstage.c | 4 | ||||
| -rw-r--r-- | src/mainboard/google/stout/romstage.c | 4 | ||||
| -rw-r--r-- | src/mainboard/samsung/lumpy/romstage.c | 4 | ||||
| -rw-r--r-- | src/mainboard/samsung/stumpy/romstage.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_rcba.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/common/rcba.h | 1 |
8 files changed, 15 insertions, 14 deletions
diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c index a300ff6958..ebcba8409c 100644 --- a/src/mainboard/google/butterfly/romstage.c +++ b/src/mainboard/google/butterfly/romstage.c @@ -96,9 +96,9 @@ void mainboard_rcba_config(void) DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD); /* Enable IOAPIC (generic) */ - RCBA16(OIC) = 0x0100; + RCBA16(EOIC) = 0x0100; /* PCH BWG says to read back the IOAPIC enable register */ - (void) RCBA16(OIC); + (void) RCBA16(EOIC); /* Disable unused devices (board specific) */ reg32 = RCBA32(FD); diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index 544bb4af6e..a1bbe34a4b 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -104,9 +104,9 @@ void mainboard_rcba_config(void) DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD); /* Enable IOAPIC (generic) */ - RCBA16(OIC) = 0x0100; + RCBA16(EOIC) = 0x0100; /* PCH BWG says to read back the IOAPIC enable register */ - (void) RCBA16(OIC); + (void) RCBA16(EOIC); } static uint8_t *locate_spd(void) diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c index 3b7c24279b..12c11141c2 100644 --- a/src/mainboard/google/parrot/romstage.c +++ b/src/mainboard/google/parrot/romstage.c @@ -95,9 +95,9 @@ void mainboard_rcba_config(void) DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD); /* Enable IOAPIC (generic) */ - RCBA16(OIC) = 0x0100; + RCBA16(EOIC) = 0x0100; /* PCH BWG says to read back the IOAPIC enable register */ - (void) RCBA16(OIC); + (void) RCBA16(EOIC); /* Disable unused devices (board specific) */ reg32 = RCBA32(FD); diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index ffa2157c8f..4f7f869a9c 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -101,9 +101,9 @@ void mainboard_rcba_config(void) DIR_ROUTE(D20IR, PIRQD, PIRQE, PIRQF, PIRQG); /* Enable IOAPIC (generic) */ - RCBA16(OIC) = 0x0100; + RCBA16(EOIC) = 0x0100; /* PCH BWG says to read back the IOAPIC enable register */ - (void) RCBA16(OIC); + (void) RCBA16(EOIC); /* Disable unused devices (board specific) */ reg32 = RCBA32(FD); diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index d7ed4350b6..ce1706810d 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -103,9 +103,9 @@ void mainboard_rcba_config(void) DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD); /* Enable IOAPIC (generic) */ - RCBA16(OIC) = 0x0100; + RCBA16(EOIC) = 0x0100; /* PCH BWG says to read back the IOAPIC enable register */ - (void) RCBA16(OIC); + (void) RCBA16(EOIC); } static const uint8_t *locate_spd(void) diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index 265530c56f..1b5d2ae2d1 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -112,9 +112,9 @@ void mainboard_rcba_config(void) DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD); /* Enable IOAPIC (generic) */ - RCBA16(OIC) = 0x0100; + RCBA16(EOIC) = 0x0100; /* PCH BWG says to read back the IOAPIC enable register */ - (void) RCBA16(OIC); + (void) RCBA16(EOIC); } static void setup_sio_gpios(void) diff --git a/src/southbridge/intel/bd82x6x/early_rcba.c b/src/southbridge/intel/bd82x6x/early_rcba.c index 990ff0d874..9ce9dc9d41 100644 --- a/src/southbridge/intel/bd82x6x/early_rcba.c +++ b/src/southbridge/intel/bd82x6x/early_rcba.c @@ -60,9 +60,9 @@ southbridge_configure_default_intmap(void) DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD); /* Enable IOAPIC (generic) */ - RCBA16(OIC) = 0x0100; + RCBA16(EOIC) = 0x0100; /* PCH BWG says to read back the IOAPIC enable register */ - (void) RCBA16(OIC); + (void) RCBA16(EOIC); } void diff --git a/src/southbridge/intel/common/rcba.h b/src/southbridge/intel/common/rcba.h index 1399fdef90..ad8285a500 100644 --- a/src/southbridge/intel/common/rcba.h +++ b/src/southbridge/intel/common/rcba.h @@ -147,6 +147,7 @@ #define D20IR 0x3160 /* 16bit */ #define D19IR 0x3168 /* 16bit */ +#define EOIC 0x31fe /* 16bit */ #define OIC 0x31ff /* 8bit */ #define DIR_ROUTE(x, a, b, c, d) \ |