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-rw-r--r--src/arch/x86/lib/romcc_console.c2
-rw-r--r--src/console/init.c12
-rw-r--r--src/lib/hardwaremain.c5
3 files changed, 10 insertions, 9 deletions
diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c
index a6424ddeee..1f2809744c 100644
--- a/src/arch/x86/lib/romcc_console.c
+++ b/src/arch/x86/lib/romcc_console.c
@@ -73,7 +73,7 @@ void console_init(void)
COREBOOT_EXTRA_VERSION
" "
COREBOOT_BUILD
- " starting...\n";
+ " romstage starting...\n";
console_hw_init();
diff --git a/src/console/init.c b/src/console/init.c
index 3dbf014919..e638216d1c 100644
--- a/src/console/init.c
+++ b/src/console/init.c
@@ -47,8 +47,14 @@ void console_init(void)
console_hw_init();
-#if defined(__PRE_RAM__)
- printk(BIOS_INFO, "\n\ncoreboot-%s%s %s starting...\n",
- coreboot_version, coreboot_extra_version, coreboot_build);
+ printk(BIOS_INFO, "\n\ncoreboot-%s%s %s %s starting...\n",
+ coreboot_version, coreboot_extra_version, coreboot_build,
+#if defined(__BOOT_BLOCK__)
+ "bootblock"
+#elif defined(__PRE_RAM__)
+ "romstage"
+#else
+ "ramstage"
#endif
+ );
}
diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c
index d43ff4684c..32162eb954 100644
--- a/src/lib/hardwaremain.c
+++ b/src/lib/hardwaremain.c
@@ -460,11 +460,6 @@ void main(void)
post_code(POST_CONSOLE_READY);
- printk(BIOS_NOTICE, "coreboot-%s%s %s booting...\n",
- coreboot_version, coreboot_extra_version, coreboot_build);
-
- post_code(POST_CONSOLE_BOOT_MSG);
-
/* Handoff sleep type from romstage. */
#if CONFIG_HAVE_ACPI_RESUME
acpi_is_wakeup();